Documentation
Français (FR)

Anglais (EN)

Philippe Maurine

17

Documents

Identifiants chercheurs

philippe-maurine
Google Scholar : https://scholar.google.fr/citations?hl=fr&user=VduRIsgAAAAJ&view_op=list_works&sortby=pubdate
IdRef : 144880717
0000-0002-9706-5710
Google Scholar : https://scholar.google.fr/citations?user=VduRIsgAAAAJ&hl=fr

Présentation

Publications

1131390

	Checking Robustness Against EM Side-Channel Attacks Prior to Manufacturing Davide Poggi , Thomas Ordas , Alexandre Sarafianos , Philippe Maurine IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2022, 41 (5), pp.1264-1275. ⟨10.1109/TCAD.2021.3092297⟩ Article dans une revue lirmm-03278781v1
	From theory to practice: horizontal attacks on protected implementations of modular exponentiations Ibrahima Diop , Yanis Linge , Thomas Ordas , Pierre-Yvan Liardet , Philippe Maurine Journal of Cryptographic Engineering, 2019, 9 (1), pp.37-52. ⟨10.1007/s13389-018-0181-1⟩ Article dans une revue lirmm-01713147v1
	Enhancing Electromagnetic Analysis Using Magnitude Squared Incoherence Philippe Maurine , Amine Dehbaoui , Victor Lomné , Thomas Ordas , Lionel Torres IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2012, 20 (3), pp.573-577. ⟨10.1109/TVLSI.2011.2104984⟩ Article dans une revue lirmm-00761786v1
	Secure Triple Track Logic Robustness Against Differential Power and Electromagnetic Analyses Victor Lomné , Amine Dehbaoui , Thomas Ordas , Philippe Maurine , Lionel Torres Journal of Integrated Circuits and Systems, 2009, 4 (1), pp.20-28. ⟨10.29292/jics.v4i1.293⟩ Article dans une revue lirmm-03613238v1

	Voltage Spikes on the Substrate to Obtain Timing Faults Karim Tobich , Philippe Maurine , Pierre-Yvan Liardet , Mathieu Lisart , Thomas Ordas DSD: Digital System Design, Sep 2013, Santander, Spain. pp.483-486, ⟨10.1109/DSD.2013.146⟩ Communication dans un congrès lirmm-01096076v1
	Yet Another Fault Injection Technique : by Forward Body Biasing Injection Philippe Maurine , Karim Tobich , Thomas Ordas , Pierre Yvan Liardet YACC'2012: Yet Another Conference on Cryptography, Sep 2012, Porquerolles Island, France Communication dans un congrès lirmm-00762035v1
	Modeling Time Domain Magnetic Emissions of ICs Victor Lomné , Philippe Maurine , Lionel Torres , Thomas Ordas , Mathieu Lisart PATMOS: Power And Timing Modeling, Optimization and Simulation, Sep 2010, Grenoble, France. pp.238-249, ⟨10.1007/978-3-642-17752-1_24⟩ Communication dans un congrès lirmm-00762033v1
	Incoherence Analysis and its Application to Time Domain EM Analysis of Secure Circuits Philippe Maurine , Amine Dehbaoui , Thomas Ordas , Victor Lomné , Lionel Torres APEMC 2010 - Asia-Pacific Symposium on Electromagnetic Compatibility, Apr 2010, Beijing, China. pp.1039-1042, ⟨10.1109/APEMC.2010.5475481⟩ Communication dans un congrès lirmm-00607894v1
	Assessment of the Immunity of Unshielded Multicore Integrated Circuits to Near Field Injection Ali Alaeldine , Thomas Ordas , Richard Perdriau , Philippe Maurine , Mohamed Ramdani International Zurich Symposium on Electromagnetic Compatibility, France. pp.361-364 Communication dans un congrès lirmm-00394411v1
	Technological countermeasures for IC protection against EM Analysis Thomas Ordas , M. Lisart , Lionel Torres , Philippe Maurine PAca Security Trends In embedded Security, Gardanne, France Communication dans un congrès lirmm-00407011v1
	Evaluation of Countermeasures against Electromagnetic Analysis Thomas Ordas , Ali Alaeldine , Philippe Maurine , Richard Perdriau , Lionel Torres EMC Europe: Electromagnetic Compatibility, Jun 2009, Athens, Greece. ⟨10.1109/EMCEUROPE.2009.5189724⟩ Communication dans un congrès hal-01271857v1
	Etude de l'effet du boîtier sur l'immunité en champ proche des circuits intégrés Ali Alaeldine , Thomas Ordas , Richard Perdriau , Philippe Maurine , Mohamed Ramdani Telecom 2009 & 6èmes JFMMA, Mar 2009, Agadir, Maroc. 4 p Communication dans un congrès hal-00522766v1
	Evaluation on FPGA of Triple Rail Logic Robustness Against DPA and DEMA Victor Lomné , Philippe Maurine , Lionel Torres , Michel Robert , Rafael Soares DATE: Design, Automation and Test in Europe, 2009, Nice, France. pp.634-639, ⟨10.1109/DATE.2009.5090744⟩ Communication dans un congrès lirmm-00372847v1
	Triple Rail Logic Robustness against DPA Victor Lomné , Thomas Ordas , Philippe Maurine , Lionel Torres , Michel Robert ReConFig 2008 - International Conference on Reconfigurable Computing and FPGAs, Dec 2008, Cancun, Mexico. pp.415-420, ⟨10.1109/ReConFig.2008.75⟩ Communication dans un congrès lirmm-00350573v1
	Prototyping Secure Triple Track Logic (STTL) Robustness Against DPA & DEMA on FPGA Victor Lomné , Rafael A. Soares , Thomas Ordas , Philippe Maurine , Lionel Torres CryptArchi: Cryptographic Architectures, Jun 2008, Tregastel, France Communication dans un congrès lirmm-00373539v1
	Near-field Mapping System to Scan in Time Domain the Magnetic Emissions of Integrated Circuits Thomas Ordas , Mathieu Lisart , Etienne Sicard , Philippe Maurine , Lionel Torres PATMOS: Power and Timing Modeling Optimization and Simulation, Sep 2008, Lisbon, Portugal. pp.229-236, ⟨10.1007/978-3-540-95948-9_23⟩ Communication dans un congrès lirmm-00394395v1

	Finding EM leakages at design stage: a simulation methodology Davide Poggi , Philippe Maurine , Thomas Ordas , Alexandre Sarafianos , Jérémy Raoult 2020 Pré-publication, Document de travail lirmm-03626774v1