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Patrick Girard

21
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990392

Scan-Chain Intra-Cell Aware Testing

Aymen Touati , Alberto Bosio , Patrick Girard , Arnaud Virazel , Matteo Sonza Reorda
IEEE Transactions on Emerging Topics in Computing, 2018, 6 (2), pp.278-287. ⟨10.1109/TETC.2016.2624311⟩
Article dans une revue lirmm-01430859v1

Microprocessor Testing: Functional Meets Structural Test

Aymen Touati , Alberto Bosio , Patrick Girard , Arnaud Virazel , Paolo Bernardi
Journal of Circuits, Systems, and Computers, 2017, 26 (08), ⟨10.1142/S0218126617400072⟩
Article dans une revue lirmm-01718578v1

A Low-Cost Reliability vs. Cost Trade-Off Methodology to Selectively Harden Logic Circuits

Arnaud Virazel , Imran Wali , Bastien Deveautour , Alberto Bosio , Patrick Girard
Journal of Electronic Testing: : Theory and Applications, 2017, 33 (1), pp.25-36. ⟨10.1007/s10836-017-5640-6⟩
Article dans une revue lirmm-01718568v1

A Hybrid Fault-Tolerant Architecture for Highly Reliable Processing Cores

Imran Wali , Arnaud Virazel , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch
Journal of Electronic Testing: : Theory and Applications, 2016, 32 (2), pp.147-161. ⟨10.1007/s10836-016-5578-0⟩
Article dans une revue lirmm-01354746v1

Fast Power Evaluation for Effective Generation of Test Programs Maximizing Peak Power Consumption

Paolo Bernardi , Mauricio de Carvalho , Ernesto Sanchez , Matteo Sonza Reorda , Alberto Bosio
Journal of Low Power Electronics, 2013, 9 (2), pp.253-263. ⟨10.1166/jolpe.2013.1259⟩
Article dans une revue lirmm-00934937v1
Image document

Effective techniques for automatically improving the transition delay fault coverage of Self-Test Libraries

Riccardo Cantoro , Francesco Garau , Patrick Girard , Nima Kolahimahmoudi , Sandro Sartoni
ETS 2022 - 27th IEEE European Test Symposium, May 2022, Barcelona, Spain. pp.1-2, ⟨10.1109/ETS54262.2022.9810392⟩
Communication dans un congrès lirmm-03739788v1
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Self-Test Libraries Analysis for Pipelined Processors Transition Fault Coverage Improvement

Riccardo Cantoro , Patrick Girard , Riccardo Masante , Sandro Sartoni , Matteo Sonza Reorda
IOLTS 2021 - 27th IEEE International Symposium on On-Line Testing and Robust System Design, Jun 2021, Torino, Italy. pp.1-4, ⟨10.1109/IOLTS52814.2021.9486711⟩
Communication dans un congrès lirmm-03380201v1
Image document

Self-Test Libraries Analysis for Pipelined Processors Transition Fault Coverage Improvement

Riccardo Cantoro , Patrick Girard , Riccardo Masante , Sandro Sartoni , Matteo Sonza Reorda
PESW 2021 - 9th Prague Embedded Systems Workshop, Jul 2021, Horoměřice, Czech Republic
Communication dans un congrès lirmm-03988459v1

An effective approach for functional test programs compaction

Aymen Touati , Alberto Bosio , Patrick Girard , Arnaud Virazel , Paolo Bernardi
DDECS: Design and Diagnostics of Electronic Circuits and Systems, Apr 2016, Kosice, Slovakia. ⟨10.1109/DDECS.2016.7482466⟩
Communication dans un congrès lirmm-01457396v1

A Low-Cost Reliability vs. Cost Trade-Off Methodology to Selectively Harden Logic Circuits

Imran Wali , Bastien Deveautour , Arnaud Virazel , Alberto Bosio , Patrick Girard
ETS: European Test Symposium, May 2016, Amsterdam, Netherlands. ⟨10.1109/ETS.2016.7519296⟩
Communication dans un congrès hal-01444734v1

Improving the Functional Test Delay Fault Coverage: A Microprocessor Case Study

Aymen Touati , Alberto Bosio , Patrick Girard , Arnaud Virazel , Paolo Bernardi
ISVLSI: International Symposium on Very Large Scale Integration, Jul 2016, Pittsburgh, PA, United States. pp.731-736, ⟨10.1109/ISVLSI.2016.42⟩
Communication dans un congrès lirmm-01446917v1
Image document

Exploring the impact of functional test programs re-used for power-aware testing

Aymen Touati , Alberto Bosio , Luigi Dilillo , Patrick Girard , Arnaud Virazel
DATE 2015 - 18th Design, Automation and Test in Europe Conference and Exhibition, Mar 2015, Grenoble, France. pp.1277-1280, ⟨10.7873/DATE.2015.1031⟩
Communication dans un congrès lirmm-01272937v1

Scan-chain intra-cell defects grading

Aymen Touati , Alberto Bosio , Luigi Dilillo , Patrick Girard , Arnaud Virazel
DTIS: Design and Technology of Integrated Systems in Nanoscale Era, Apr 2015, Naples, Italy. ⟨10.1109/DTIS.2015.7127349⟩
Communication dans un congrès lirmm-01272696v1

Design space exploration and optimization of a Hybrid Fault-Tolerant Architecture

Imran Wali , Arnaud Virazel , Alberto Bosio , Patrick Girard , Matteo Sonza Reorda
IOLTS: International On-Line Testing Symposium, Jul 2015, Halkidiki, Greece. pp.89-94, ⟨10.1109/IOLTS.2015.7229838⟩
Communication dans un congrès lirmm-01272735v1

An effective ATPG flow for Gate Delay Faults

Alberto Bosio , Luigi Dilillo , Patrick Girard , Arnaud Virazel , Paolo Bernardi
DTIS: Design and Technology of Integrated Systems in Nanoscale Era, Apr 2015, Naples, Italy. ⟨10.1109/DTIS.2015.7127350⟩
Communication dans un congrès lirmm-01272719v1

Peak Power Estimation: A Case Study on CPU Cores

Paolo Bernardi , Mauricio de Carvalho , Ernesto Sanchez , Matteo Sonza Reorda , Alberto Bosio
IEEE Asian Test Symposium, Nov 2012, Niigata, Japan. pp.167-172, ⟨10.1109/ATS.2012.58⟩
Communication dans un congrès lirmm-00805389v1

A Functional Power Evaluation Flow for Defining Test Power Limits during At-Speed Delay Testing

Miroslav Valka , Alberto Bosio , Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch
ETS 2011 - 16th IEEE European Test Symposium, May 2011, Trondheim, Norway. pp.153-158, ⟨10.1109/ETS.2011.21⟩
Communication dans un congrès lirmm-00647822v1

An Exact and Efficient Critical Path Tracing Algorithm

Alberto Bosio , Patrick Girard , Serge Pravossoudovitch , Paolo Bernardi , Matteo Sonza Reorda
DELTA'10: Electronic Design, Test and Application, Vietnam. pp.164-169, ⟨10.1109/DELTA.2010.35⟩
Communication dans un congrès lirmm-00539738v1

An Efficient Fault Simulation Technique for Transition Faults in Non-Scan Sequential Circuits

Alberto Bosio , Paolo Bernardi , Patrick Girard , Serge Pravossoudovitch , Matteo Sonza Reorda
DDECS'09: 12th IEEE Symposium on Design and Diagnostics of Electronic Systems, pp.50-55
Communication dans un congrès lirmm-00371197v1