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Michel Robert
72
Documents
Identifiants chercheurs
michel-robert-
0000-0002-5075-2898
Présentation
Michel ROBERT (PhD:1987) is Professor at the University of Montpellier (France), where he’s teaching microelectronics in the engineering program. His present research interests at the Montpellier Laboratory of Informatics, Robotics, and Micro-electronics ([LIRMM](https://www.lirmm.fr/)) are design and modelisation of system on chip architectures. He is author or co-author of more than 300 publications in the field of CMOS integrated circuits design. He has supervised around forty doctoral thesis. He chaired the IFIP WG 10.5 (International Federation for Information Processing) from 2007 to 2011.
He served as director of the doctoral school, of the LIRMM research laboratory, then of the laboratory of excellence for digital solutions and modeling for the environment and the living, before becoming president of the University of Montpellier (2012-2015). He has held various national responsibilities in monitoring and evaluation in higher education and research. He was Director of the Institutional Evaluation Department of the High Council for the Evaluation of Research and Higher Education (Hcéres) from 2016 to 2021.
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L’impact énergétique des flux de données numériquesColloque Energie du CNRS, Cellule énergie du CNRS, Dec 2021, Paris, France
Communication dans un congrès
hal-03521821v1
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Exploration of Energy-Proportional Distributed Systems13e Colloque National du GDR SoC², Jun 2019, Montpellier, France
Communication dans un congrès
hal-03326292v1
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Full-System Simulation of big.LITTLE Multicore Architecture for Performance and Energy ExplorationMCSoC: Embedded Multicore/Many-core Systems-on-Chip, Sep 2016, Lyon, France. pp.201-208, ⟨10.1109/MCSoC.2016.20⟩
Communication dans un congrès
lirmm-01418745v1
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OpenMP scheduling on ARM big.LITTLE architectureMULTIPROG 2016 - 9th International Workshop on Programmability and Architectures for Heterogeneous Multicores, HIPEAC, Jan 2016, Prague, Czech Republic
Communication dans un congrès
lirmm-01377630v1
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Design Exploration for next Generation High-Performance Manycore On-chip Systems: Application to big.LITTLE ArchitecturesISVLSI: International Symposium on Very Large Scale Integration, Jul 2015, Montpellier, France. pp.551-556, ⟨10.1109/ISVLSI.2015.28⟩
Communication dans un congrès
lirmm-01255927v1
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Simultaneous multithreading support in embedded distributed memory MPSoCsDAC 2013 - 50th Design Automation Conference, May 2013, Austin, United States. pp.83:1-83:7, ⟨10.1145/2463209.2488836⟩
Communication dans un congrès
lirmm-01391168v1
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Open-Scale: A Scalable, Open-Source NOC-based MPSoC for Design Space ExplorationReConFig 2011 - International Conference on Reconfigurable Computing and FPGAs, Nov 2011, Cancun, Mexico. pp.357-362, ⟨10.1109/ReConFig.2011.66⟩
Communication dans un congrès
hal-01139181v1
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Providing Better Multi-Processor Systems-on-Chip Resources Utilization by Means of Using a Control-Loop Feedback MechanismReConFig 2010 - International Conference on ReConFigurable Computing and FPGAs, Dec 2010, Cancun, Mexico. pp.382-387, ⟨10.1109/ReConFig.2010.17⟩
Communication dans un congrès
lirmm-00548837v1
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Adaptative Integrated Systems for Optimal Hardware UsageEcole d'hiver Francophone sur les Technologies de Conception des Systèmes Embarqués Hétérogènes (FETCH 2010), Jan 2010, Chamonix, France
Communication dans un congrès
lirmm-00450767v1
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Adaptation Strategies in Multiprocessors System on ChipVLSI-SoC: Very Large Scale Integration - System-on-Chip, Sep 2010, Madrid, Spain. pp.233-257, ⟨10.1007/978-3-642-28566-0_10⟩
Communication dans un congrès
hal-01515993v1
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JubiTool: Unified Design Flow for the Perplexus SIMD Hardware AcceleratorCEC'09: IEEE Congress on Evolutionary Computation, 2009, Trondheim, Norway. pp.2070-2075
Communication dans un congrès
lirmm-00372859v1
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Baf: A Bio-Inspired Agent Framework for Distributed Pervasive ApplicationsGEM'08: Genetic and Evolutionary Mechanisms, Las Vegas, USA, pp.N/A
Communication dans un congrès
lirmm-00374063v1
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A Bio-Inspired Agent Framework for Hardware Accelerated Distributed Pervasive ApplicationsAHS'09: NASA/ESA Conference on Adaptive Hardware and Systems, Jul 2009, San Fransisco, United States. pp.415-422, ⟨10.1109/AHS.2009.54⟩
Communication dans un congrès
lirmm-00419914v1
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The Perplexus Programming Framework: Combining Bio-inspiration and Agent-Oriented Programming for the Simulation of Large Scale Complex SystemsICES 2008 - International Conference on Evolvable Systems, Sep 2008, Prague, Czech Republic. pp.402-407, ⟨10.1007/978-3-540-85857-7_36⟩
Communication dans un congrès
lirmm-00282971v1
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Bio-Inspiration Helps Computers: An New MachineFPL'08: The 18th International Conference on Field-Programmable Logic and Applications, Sep 2008, Heidelberg, Germany. pp.697-698
Communication dans un congrès
lirmm-00326534v1
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A Non-Volatile Field Programmable Gate Array using Thermally Assisted Switching MRAMsICESCA'08: International Conference on Embedded Systems & Critical Applications, May 2008, Gammarth, Tunisia. pp.95-100
Communication dans un congrès
lirmm-00282964v1
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MPI-Based Adaptive Task Migration Support on the HS-Scale SystemISVLSI 2008 - IEEE Computer Society Annual Symposium on VLSI, Apr 2008, Montpellier, France. pp.105-110, ⟨10.1109/ISVLSI.2008.87⟩
Communication dans un congrès
lirmm-00280687v1
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Application Case Studies on HS-Scale, a MP-SOC for Embbeded SystemsEmbedded Computer Systems: Architectures, Modeling and Simulation (SAMOS), Jul 2007, Samos, Greece. pp.88-95, ⟨10.1109/ICSAMOS.2007.4285738⟩
Communication dans un congrès
lirmm-00179513v1
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Architectural Issues in Homogeneous NOC-Based MPSOCRSP'07: 18th IEEE/IFIP International Workshop on Rapid System Prototyping, May 2007, Porto Alegre, Brazil, pp.139-142
Communication dans un congrès
lirmm-00179622v1
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The Perplexus ProjectDASIP'07: Workshop on Design and Architectures for Signal and Image Processing, Nov 2007, Grenoble, France, France. pp.N/A
Communication dans un congrès
lirmm-00202692v1
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An Adaptative MP-SoC Architecture for Embedded SystemsCAR'07: 2nd National Workshop on Control Architectures of Robots: From Models to Execution on Distributed Control Architectures, Jun 2007, Paris, France. pp.101-107
Communication dans un congrès
lirmm-00179505v1
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HS-Scale: A Hardware-Software Scalable MP-SOC Architecture for Embedded SystemsISVLSI'07: IEEE Computer Society Annual Symposium on VLSI, 2007, Porto Allegre, Brazil, pp.21-28
Communication dans un congrès
lirmm-00154074v1
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HS Scale: A Run-Time Adaptable MP-SoC ArchitectureReCoSoC'07: International Workshop on Reconfigurable Communication Centric System-On-Chips, Jun 2007, Montpellier, France. pp.CDROM
Communication dans un congrès
lirmm-00179482v1
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A Leak Resistant Architecture Against Side Channel AttacksFPL: Field-Programmable Logic and Applications, Aug 2006, Madrid, Spain. pp.881-884, ⟨10.1109/FPL.2006.311335⟩
Communication dans un congrès
lirmm-00102784v1
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Dynamic hardware multiplexing: improving adaptability with a run time reconfiguration managerISVLSI 2006 - IEEE Computer Society Annual Symposium on VLSI, Mar 2006, Karlsruhe, Germany. pp.251-256, ⟨10.1109/ISVLSI.2006.38⟩
Communication dans un congrès
lirmm-00102766v1
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Implémentation Matérielle d'une Arithmétique Résistante aux FuitesRenPar/ SympAAA/ CFSE - Rencontres Francophones en Parallélisme, Architecture, Adéquation Algorithmes Architecture et Système, Oct 2006, Canet en Roussillon, France. pp.57-74
Communication dans un congrès
lirmm-00107317v1
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A Leak Resistant SoC to Counteract Side Channel AttacksSOC'06: International Symposium on System-On-Chip, Nov 2006, Tampere, Finlande, pp.N/A
Communication dans un congrès
lirmm-00352713v1
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Current Mask Generation: an Analog Circuit to Thwart DPA AttacksVLSI-SoC 2005 - 13th International Conference on Very Large Scale Integration of System on Chip, Oct 2005, Perth, Australia. pp.317-330, ⟨10.1007/978-0-387-73661-7_20⟩
Communication dans un congrès
lirmm-00102782v1
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Run-Time Scheduling for Random Multi Tasking in Reconfigurable CoprocessorsFPL'05 IEEE : 15th International Workshop on Field-Programmable Logic and Applications, Aug 2005, Tampere (Finlande), pp.703-706
Communication dans un congrès
lirmm-00106057v1
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A GALS Network on Chip with Quality of Service supportSAME'05: Sophia-Antipolis Forum on MicroElectronics, Oct 2005, Sophia Antipolis, France. pp.199-207
Communication dans un congrès
lirmm-00106526v1
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Gestion Matérielle du Parallélisme pour les Architectures Reconfigurables à Grain EpaisJFAAA'05: Journées Francophones sur l'Adéquation Algorithme Architecture, Jan 2005, Dijon, France. pp.15-20
Communication dans un congrès
lirmm-00106510v1
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Current Mask Generation: A Transistor Level Security Against DPA AttacksSBCCI 2005 - 18th annual symposium on Integrated circuits and system design, Sep 2005, Florianolpolis, Brazil. pp.115-120, ⟨10.1145/1081081.1081114⟩
Communication dans un congrès
lirmm-03704230v1
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A RTR Hardware Controller for DSP Kernel Scheduling in Coarse Grain Reconfigurable ArchitectureIPDPS'05: International Parallel and Distributed Processing SymposiumRAW'05: Reconfigurable Architectures Workshop, Apr 2005, pp.485-489
Communication dans un congrès
lirmm-00105958v1
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A Mesh Based Network on Chip characterization : A GALS ApproachDCIS 2005 - 20th Conference on Design of Circuits and Integrated Systems, Nov 2005, Lisbonne, Portugal. pp.10-15
Communication dans un congrès
lirmm-00106054v1
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Packet-Switching Network-On-Chip Features Exploration and CharacterizationVLSI-SOC'05: IFIP International Conference on Very Large Scale Integration, Oct 2005, Perth, Australia. pp.403-409
Communication dans un congrès
lirmm-00106440v1
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Automatic Task Scheduling/Loop Unrolling Using Dedicated RTR Controllers in Coarse Grain Recongigurable ArchitecturesIPDPS'05: International Parallel and Distributed Processing Symposium, RAW'05: Reconfigurable Architectures Workshop, Apr 2005, Denver, Colorado (USA), pp.148
Communication dans un congrès
lirmm-00105985v1
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System On Chip (SOC) : Du Composant... au ComposantJournées Nationales du GDR et RTP Nanoélectronique, May 2004, Aussois, France
Communication dans un congrès
lirmm-00108673v1
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Metrics for Digital Signal Processing Architectures Characterization: Remanence and ScalabilitySAMOS 2004 - 4th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, Jul 2004, Samos, Greece. pp.128-137
Communication dans un congrès
lirmm-00269656v1
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Réseaux d'interconnexion pour les systèmes sur Puce : le réseau HERMESSCS 2004 - Signaux, Circuits et Systèmes, Mar 2004, Monastir, Tunisia. pp.35-40
Communication dans un congrès
lirmm-00352701v1
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Réseau d'interconnexion pour les systèmes sur pucesJNRDM'04: 7èmes Journées Nationales du Réseau Doctoral de Microélectronique, May 2004, Marseille, France. pp.451-453
Communication dans un congrès
lirmm-00355900v1
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Comparaison des Architectures Dédiées au Traitement des Données NumériquesJNRDM'03 : 6ièmes Journées Nationales du Réseau Doctoral de Microélectronique, May 2003, Toulouse (France), France. pp.115-117
Communication dans un congrès
lirmm-00269542v1
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Are Coarse Grain Reconfigurable Architectures Suitable for Cryptography?12th International Conference on Very Large Scale Integration of System-on-Chip (VLSI-SoC), Dec 2003, Darmstadt, Germany. pp.276-281
Communication dans un congrès
lirmm-00269699v1
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Comparaison d'Architectures Dédiées au Traitement Numériques des Données : du Processeur aux Architectures ReconfigurablesRenPar/ SympAAA/ CFSE - Rencontres Francophones en Parallélisme, Architecture, Adéquation Algorithmes Architecture et Système, Oct 2003, La Colle sur Loup, France. pp.322-326
Communication dans un congrès
lirmm-00269654v1
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A Novel Approach for Architectural Model Characterization. An Example through the Systolic Ring.FPL 2003 - 12th International Workshop on Field-Programmable Logic and Applications, Sep 2003, Lisbon, Portugal. pp.722-732, ⟨10.1007/978-3-540-45234-8_70⟩
Communication dans un congrès
lirmm-00269558v1
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Metrics for Reconfigurable Architectures Characterization: Remanence and ScalabilityIPDPS: International Parallel and Distributed Processing Symposium, Apr 2003, Nice, France. pp.176-180, ⟨10.1109/IPDPS.2003.1213324⟩
Communication dans un congrès
lirmm-00269655v1
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Caractérisation et Comparaison d'Architectures Reconfigurables Dynamiquement, un exemple : Le Systolic RingJFAAA'02: Journées Francophones sur l'Adéquation Algorithme Architecture, Dec 2002, Monastir, Tunisie. pp.30-34
Communication dans un congrès
lirmm-00269344v1
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Architectures Reconfigurables Dynamiquement pour Applications TSIColloque du GDR CAO de Circuits et Systèmes Intégrés, May 2002, Paris, France. pp.67-70
Communication dans un congrès
lirmm-00269321v1
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Distributed Pervasive Phylogenetic Application using a Bio-Inspired Agent FrameworkColloque GDR SoC-SiP, 2008, Paris, France. 2008
Poster de conférence
lirmm-00406765v1
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Towards Self-Adaptability a Scalable MP-SOC Architecture ApproachColloque du GDR SoC-SiP, 2007, Paris, France. 2007
Poster de conférence
lirmm-00406773v1
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Perplexus ProjectColloque du GDR SoC-SiP, 2007, Paris, France. 2007
Poster de conférence
lirmm-00406772v1
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Dynamic Hardware Multiplexing for Coarse Grain Reconfigurable ArchitecturesFPGA'05: ACM/SIGDA 9th International Symposium on Field Programmable Gate Arrays, Feb 2005, Monterey, CA, United States. ACM Press, 2005
Poster de conférence
lirmm-00105959v1
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Packet-Switching Network-On-Chip Feature Exploration and CharacterizationRECoSoC'05: Reconfigurable Communication-Centric SoCs, Jun 2005, Montpellier, France. 2005
Poster de conférence
lirmm-00355893v1
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The Systolic Ring: A Scalable Dynamically Reconfigurable Core for Embedded SystemsSAME'02: Sophia-Antipolis Forum on MicroElectronics, Oct 2002, Sophia-Antipolis, France. pp.85-90, 2002
Poster de conférence
lirmm-00269322v1
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Towards Autonomous Scalable Integrated SystemsDesign Technology for Heterogeneous Embedded Systems, Springer, pp.63-89, 2012, 978-94-007-1124-2. ⟨10.1007/978-94-007-1125-9_4⟩
Chapitre d'ouvrage
lirmm-01399454v1
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An Introduction to Multi-Core System on Chip - Trends and ChallengesHübner, Michael; Becker, Jürgen. Multiprocessor System-on-Chip - Hardware Design and Tool Integration, Springer, pp.1-21, 2011, Chapter 1, 978-1-4419-6459-5. ⟨10.1007/978-1-4419-6460-1_1⟩
Chapitre d'ouvrage
lirmm-00574947v1
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Current Mask Generation: An Analog Circuit to Thwart DPA AttacksVLSI-SoC: From Systems to Silicon, Springer, pp.317-330, 2007, 978-0-387-73660-0
Chapitre d'ouvrage
lirmm-00203662v1
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Dynamically Reconfigurable Architectures for Digital Signal Processing ApplicationsSOC Design Methodologies, 90, Kluwer Academic Publishers 2002, pp.63-74, 2002, IFIP — The International Federation for Information Processing, 978-1-4757-6530-4. ⟨10.1007/978-0-387-35597-9_6⟩
Chapitre d'ouvrage
lirmm-00108929v1
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Data Processing System with Energy TransferFrance, Patent n° : WO2017178571. 2016
Brevet
lirmm-02145436v1
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Architecture de Transport de Données en Anneau comprenant un Réseau de RétropopagationÉtats-Unis, N° de brevet: 0204162. 9764. 2002, pp.P/N
Brevet
lirmm-00268654v1
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Architecture de Calcul Logique comprenant plusieurs Modes de ConfigurationÉtats-Unis, N° de brevet: 0204161. 9763. 2002, pp.P/N
Brevet
lirmm-00268653v1
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Emerging NVM Technologies in Main Memory for Energy-Efficient HPC: an Empirical Study2019
Pré-publication, Document de travail
lirmm-02135043v1
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