Documentation
Français (FR)

Anglais (EN)

Laurent Fesquet

10

Documents

Présentation

français
anglais

Publications

926842

	An asynchronous FPGA block with its tech-mapping algorithm dedicated to security applications T. Beyrouthy , Laurent Fesquet International Journal of Reconfigurable Computing, 2013, 2013 (Article ID 517947), 12 p. ⟨10.1155/2013/517947⟩ Article dans une revue hal-00819126v1

	Data Sampling and Processing: Uniform vs. Non-Uniform Schemes T. Beyrouthy , Laurent Fesquet , B. Rolland 1st IEEE International Conference on Event-Based Control, Communication and Signal Processing (EBCCSP'15), Jun 2015, Krakow, Poland Communication dans un congrès hal-01393405v1
	Low-power signal processing platform based on non-uniform sampling and event-driven circuitry T. Le Pelleter , T. Beyrouthy , Y. Leroy , Agnès Bonvilain , R. Rolland Design, Automation and Test in Europe (DATE'13), Mar 2013, Grenoble, France Communication dans un congrès hal-00841614v1
	Non-uniform sampling pattern recognition based on atomic decomposition T. Le Pelleter , T. Beyrouthy , B. Rolland , Agnès Bonvilain , Laurent Fesquet 10th International Conference on Sampling Theory and Applications (SampTA 2013), Jul 2013, Bremen, Germany Communication dans un congrès hal-00842215v1
	Updates on the Potential of Clock-Less Logics to Strengthen Cryptographic Circuits against Side-Channel Attacks Sylvain Guilley , Sumanta Chaudhuri , Laurent Sauvage , Jean-Luc Danger , Taha Beyrouthy IEEE International Conference on Electronics and Systems (ICECS'09), Dec 2009, Hammamet, Tunisia. pp.351 - 354, ⟨10.1109/ICECS.2009.5411008⟩ Communication dans un congrès hal-00472064v1
	A Secure Programmable Architecture with a Dedicated Tech-mapping Algorithm: Application to a Crypto-Processor T. Beyrouthy , Laurent Fesquet , Alin Razafindraibe , S. Chaudhuri , S. Guilley 23rd International Conference on Design of Circuits and Integrated Systems (DCIS'08), Nov 2008, Grenoble, France. pp.session 3b3 Communication dans un congrès hal-00346734v1
	A secure asynchronous configurable cell: an embedded programmable logic for smartcards Laurent Fesquet , Taha Beyrouthy Workshop on Cryptographic Architectures embedded in reconfigurable devices (CryptArchi 2008), Jun 2008, Tregastel, France Communication dans un congrès hal-00293681v1
	A Reconfigurable Cell for a Multi-Style Asynchronous FPGA Philippe Hoogvorst , Sylvain Guilley , Alin Razafindraibe , Taha Beyrouthy , Laurent Fesquet RecoSoC: Reconfigurable Communication-centric Systems-on-Chip, Jun 2007, Montpellier, France. pp.15-22 Communication dans un congrès hal-00222887v1
	Secure Asynchronous FPGA for Embedded Systems (SAFE) T. Beyrouthy , Alin Razafindraibe , Laurent Fesquet , Marc Renaudin Colloque du GDR SoC-SiP, Jun 2007, Paris, France Communication dans un congrès hal-00178955v1

	Physical Design of FPGA Interconnect to Prevent Information Leakage Sumanta Chaudhuri , Sylvain Guilley , Philippe Hoogvorst , Jean-Luc Danger , Taha Beyrouthy Woods, R.; Compton, K.; Bourganis, C.; Diniz, P.C. Reconfigurable Computing: Architecture, Tools, and Applications, 4943, Springer, pp.87-98, 2008, Lecture Notes in Computer Science, ⟨10.1007/978-3-540-78610-8_11⟩ Chapitre d'ouvrage hal-00299487v1