Gilles Sassatelli
5
Documents
Identifiants chercheurs
gilles-sassatelli-
0000-0002-6396-286X
- IdRef : 069998035
Présentation
Publications
- 2
- 2
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 5
- 5
- 5
- 4
- 3
- 2
- 2
- 1
- 1
- 1
- 1
- 1
- 1
- 2
- 3
- 1
- 1
|
|
Improving the Performance of STT-MRAM LLC through Enhanced Cache Replacement PolicyARCS: Architecture of Computing Systems, Apr 2018, Braunschweig, Germany. pp.168-180, ⟨10.1007/978-3-319-77610-1_13⟩
Communication dans un congrès
lirmm-01669254v2
|
|
|
Full-System Simulation of big.LITTLE Multicore Architecture for Performance and Energy ExplorationMCSoC: Embedded Multicore/Many-core Systems-on-Chip, Sep 2016, Lyon, France. pp.201-208, ⟨10.1109/MCSoC.2016.20⟩
Communication dans un congrès
lirmm-01418745v1
|
|
|
OpenMP scheduling on ARM big.LITTLE architectureMULTIPROG 2016 - 9th International Workshop on Programmability and Architectures for Heterogeneous Multicores, HIPEAC, Jan 2016, Prague, Czech Republic
Communication dans un congrès
lirmm-01377630v1
|
|
|
Performance and Energy Impact of Enhanced Cache Replacement Policy on STT-MRAM LLC2021
Pré-publication, Document de travail
lirmm-03341604v1
|
|
|
Emerging NVM Technologies in Main Memory for Energy-Efficient HPC: an Empirical Study2019
Pré-publication, Document de travail
lirmm-02135043v1
|