Frédéric Mallet
Professeur des Universités
Université Côte d'Azur
9
Documents
Affiliations actuelles
- 451999
- 13009
- 478607
- 1039632
Identifiants chercheurs
frederic-mallet- ResearcherId : H-3942-2011
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0000-0002-9088-9821
- IdRef : 060764325
- ResearcherId : http://www.researcherid.com/rid/H-3942-2011
Publications
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The Clock Constraint Specification Language for building timed causality modelsInnovations in Systems and Software Engineering, 2010, 6 (1-2), pp.99-106. ⟨10.1007/s11334-009-0109-0⟩
Article dans une revue
inria-00464894v1
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Time in SCChartsForum on specification & Design Languages, Sep 2018, Munich, Germany. pp.5-16, ⟨10.1109/FDL.2018.8524111⟩
Communication dans un congrès
hal-01898285v1
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Explicit Control of Dataflow Graphs with MARTE/CCSLMODELSWARD 2017 - 5th International Conference on Model-Driven Engineering and Software Development, MODELSWARD 2017, Feb 2017, Porto, Portugal. pp.542-549, ⟨10.5220/0006269505420549⟩
Communication dans un congrès
hal-01644294v1
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Execution of Heterogeneous Models for Thermal Analysis with a Multi-view ApproachFDL 2014 : Forum on specification and Design Languages, Oct 2014, Munich, Germany
Communication dans un congrès
hal-01060309v1
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Combining SystemC, IP-XACT and UML/MARTE in model-based SoC designWorkshop on Model Based Engineering for Embedded Systems Design (M-BED 2011), Mar 2011, Grenoble, France
Communication dans un congrès
inria-00601840v1
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Time in SCChartsLanguage, Design Methods, and Tools for Electronic System Design, Springer, pp.1-25, 2019, ⟨10.1007/978-3-030-31585-6_1⟩
Chapitre d'ouvrage
hal-02434885v1
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UML MARTE Time Model and Its Clock Constraint Specification LanguageAlessandra Bagnato; Leandro Soares Indrusiak; Imran Rafiq Quadri; Matteo Rossi. Embedded Systems Design, IGI Global, 2014, Handbook of Research on, 9781466661943. ⟨10.4018/978-1-4666-6194-3.ch002⟩
Chapitre d'ouvrage
hal-01079039v1
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The Time Model of Logical Clocks available in the OMG MARTE profileSandeep K. Shukla and Jean-Pierre Talpin. Synthesis of Embedded Software: Frameworks and Methodologies for Correctness by Construction, Springer Science+Business Media, LLC 2010, pp.28, 2010, 978-1-4419-6399-4
Chapitre d'ouvrage
inria-00495664v1
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Schedulability analysis by exhaustive state space construction: translating CCSL to transition-based Generalized Buchi Automata[Research Report] RR-8102, 2012, pp.22
Rapport
hal-00743874v1
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