Damien Deleruyelle
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Design and Simulation of a 128 kb Embedded Nonvolatile Memory Based on a Hybrid RRAM (HfO$_2$ )/28 nm FDSOI CMOS TechnologyIEEE Transactions on Nanotechnology, 2017, 16, pp.677 - 686. ⟨10.1109/TNANO.2017.2703985⟩
Article dans une revue
hal-01745418v1
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Synchronous Non-Volatile Logic Gate Design Based on Resistive Switching MemoriesIEEE Transactions on Circuits and Systems I: Regular Papers, 2014, 61 (2), pp.443 - 454. ⟨10.1109/TCSI.2013.2278332⟩
Article dans une revue
hal-01743999v1
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Design and analysis of crossbar architecture based on complementary resistive switching non-volatile memory cellsJournal of Parallel and Distributed Computing, 2014, 74 (6), pp.2484 - 2496. ⟨10.1016/j.jpdc.2013.08.004⟩
Article dans une revue
hal-01744000v1
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An Overview of Non-Volatile Flip-Flops Based on Emerging Memory TechnologiesJournal of Electronic Science and Technology, 2014, 12 (2), pp.173 - 181. ⟨10.3969/j.issn.1674-862X.2014.02.007⟩
Article dans une revue
hal-01745646v1
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Synchronous Full-Adder based on Complementary Resistive Switching Memory Cells11th International New Circuits and Systems Conference (NEWCAS), Jun 2013, Paris, France. ⟨10.1109/NEWCAS.2013.6573578⟩
Communication dans un congrès
hal-01840795v1
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Analytical study of complementary memristive synchronous logic gates2013 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), Jul 2013, Brooklyn, United States. ⟨10.1109/NanoArch.2013.6623047⟩
Communication dans un congrès
hal-01745759v1
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Analytical study of complementary memristive synchronous logic gates2013 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), Jul 2013, Brooklyn, France. ⟨10.1109/NanoArch.2013.6623047⟩
Communication dans un congrès
hal-01827052v1
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