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Arnaud Virazel

11

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1100642

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arnaud-virazel
IdRef : 068454724
ISNI : 0000000139422532
0000-0001-7398-7107

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1083523

	A Comprehensive Analysis of Transition Fault Coverage and Test Power Dissipation for LOS and LOC Schemes Fangmei Wu , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch Journal of Low Power Electronics, 2010, 6 (2), pp.359-374. ⟨10.1166/jolpe.2010.1086⟩ Article dans une revue lirmm-00553548v1

	Effective Launch-to-Capture Power Reduction for LOS Scheme with Adjacent-Probability-Based X-Filling Kohei Miyase , Yuta Uchinodan , Kazunari Enokimoto , Yuta Yamato , Xiaoqing Wen ATS: Asian Test Symposium, 2011, New Delhi, India. pp.21-23 Communication dans un congrès lirmm-00651247v1
	Mapping Test Power to Functional Power through Smart X-Filling for LOS Scheme Fangmei Wu , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch LPonTR'11: IEEE International Workshop on the Impact of Low Power on Test and Reliability, Trondheim, Norway Communication dans un congrès lirmm-00651905v1
	Test Relaxation and X-filling to Reduce Peak Power During At-Speed LOS Testing Fangmei Wu , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch GDR SOC-SIP'10 : Colloque GDR SoC-SiP, Cergy, France Communication dans un congrès lirmm-00553989v1
	Power Reduction Through X-filling of Transition Fault Test Vectors for LOS Testing Fangmei Wu , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch DTIS: Design and Technology of Integrated Systems in Nanoscale Era, 2011, Athènes, Greece. ⟨10.1109/DTIS.2011.5941434⟩ Communication dans un congrès lirmm-00647760v1
	Power-Aware Test Pattern Generation for At-Speed LOS Testing Alberto Bosio , Luigi Dilillo , Patrick Girard , Aida Todri-Sanial , Arnaud Virazel ATS: Asian Test Symposium, Nov 2011, New Delhi, India. pp.506-510 Communication dans un congrès lirmm-00651917v1
	Analysis of Power Consumption and Transition Fault Coverage for LOS and LOC Testing Schemes Wu Fangmei , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch DDECS'10: 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Apr 2010, Vienna, Austria. pp.376-381 Communication dans un congrès lirmm-00475734v1
	Power Reduction Through X-filling of Transition Fault Test Vectors for LOS Testing Fangmei Wu , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch LPonTR:  Impact of Low-Power design on Test and Reliability, May 2010, Prague, Czech Republic Communication dans un congrès lirmm-00553930v1
	Trade-off Between Power Dissipation and Delay Fault Coverage For LOS and LOC Testing Schemes Fangmei Wu , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch Impact of Low-Power Design on Test and Reliability, Spain Communication dans un congrès lirmm-00435005v1

	Is Test Power Reduction Through X-Filling Good Enough? Fangmei Wu , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch ITC'2010: International Test Conference, Nov 2010, Austin, Texas, United States. 2010 Poster de conférence lirmm-00537926v1
	Trade-off Between Power Dissipation and Delay Fault Coverage for LOS and LOC Testing Schemes Fangmei Wu , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch GDR SOC SIP, France. 2009 Poster de conférence lirmm-00434959v1