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Amer BAGHDADI
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Documents
Identifiants chercheurs
amer-baghdadi-
0000-0002-6181-6500
- IdRef : 067318398
Présentation
**Amer Baghdadi** is a Professor at IMT Atlantique. He received his Engineering degree in 1998, Master of Science degree in the same year and PhD degree in 2002, all from Grenoble INP (Institut National Polytechnique), France. Furthermore, he received the accreditation to supervise research (HDR) in Sciences and Technologies of Information and Communication in 2012 from the University of Southern Brittany, France.
His general technical area concerns both theoretical and practical aspects, and both algorithm development for digital baseband components and corresponding hardware/software implementations and digital circuit design. His research activities target mainly digital communication applications, in addition to other application domains, and more particularly the design of flexible digital physical layer for future wireless communication standards and terminals. Prof. Baghdadi is IEEE Senior Member. He serves on the technical program committee for several international conferences. He co-authored more than 100 papers on scientific journals and proceedings of international conferences.
Publications
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Parallelism Efficiency in Convolutional Turbo DecodingEURASIP Journal on Advances in Signal Processing, 2010, vol. 2010, Article ID 927920, 11 p. ⟨10.1155/2010/927920⟩
Article dans une revue
hal-00569878v1
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From parallelism levels to a multi-ASIP architecture for turbo decodingIEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2009, 17 (1), pp.92 - 102. ⟨10.1109/TVLSI.2008.2003164⟩
Article dans une revue
hal-01853650v1
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Bandwidth reduction of extrinsic information exchange in turbo decodingElectronics Letters, 2006, 42 (19), pp.1104 - 1106. ⟨10.1049/el:20062209⟩
Article dans une revue
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FPGA prototypes for turbo communication applicationsUniversity Booth of DATE 09 : Design, Automation & Test in Europe Conference & Exhibition, Apr 2009, Nice, France
Communication dans un congrès
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From application to ASIP-based FPGA prototype : a case study on turbo decodingRSP'2008 : the 19th IEEE/IFIP international symposium on rapid system prototyping, Jun 2008, Monterey, United States. pp.128 - 134, ⟨10.1109/RSP.2008.16⟩
Communication dans un congrès
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Butterfly and benes-based on-chip communication networks for multiprocessor turbo decodingDATEC 2007 : Design, Automation & Test in Europe Conference & Exhibition, Apr 2007, Nice, France. pp.654 - 659
Communication dans un congrès
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Flexible Multi-ASIP SoC for High-Throughput Turbo DecodersPremier Colloque National du GDR SOC-SIP, Jun 2007, Paris, France
Communication dans un congrès
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On the parallelism of convolutional turbo decoding and interleaving interferenceGLOBECOM 2006 : 49th annual Global telecommunications conference, Nov 2006, San Francisco, United States. pp.1 - 5, ⟨10.1109/GLOCOM.2006.558⟩
Communication dans un congrès
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Exploring parallel processing levels for convolutional turbo decodingICCTA'06 : IEEE International Conference on Information and Communication Technologies : from theory to applications, April 24-28, Damas, Syria, Apr 2006, Damas, Syria. pp.2353 - 2358
Communication dans un congrès
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Parallélisme et turbocodes convolutifsMajecSTIC 2006 : MAnifestation des JEunes Cherchercheurs STIC, Nov 2006, Lorient, France
Communication dans un congrès
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ASIP-based multiprocessor SoC design for simple and double binary turbo decodingDATE 06 : Design, Automation and Test in Europe, Mar 2006, Munich, Germany. pp.1 - 6, ⟨10.1109/DATE.2006.244126⟩
Communication dans un congrès
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