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Abdoulaye Gamatié

20
Documents

Présentation

**Biography:** Abdoulaye Gamatié is currently a CNRS Senior Researcher (Directeur de Recherche [CNRS](http://www.cnrs.fr/index.php)) in the Microelectronics department of the [LIRMM](http://www.lirmm.fr/lirmm_eng) laboratory (Montpellier - France). His research activity focuses on the design of energy-efficient multicore/multiprocessor architectures for embedded and high-performance computing. He is the scientific leader of the French ANR project [CONTINUUM](http://www.lirmm.fr/continuum-project). He co-authored more than 50 articles in refereed journals and international conferences. He is the author of a [reference book](http://www.springer.com/engineering/circuits+%26+systems/book/978-1-4419-0940-4) on synchronous programming of embedded applications using the Signal language. He also contributed to several books as editor and chapter author. He is currently Associate Editor of ACM Transactions on Embedded Computing Systems (ACM TECS). He received his Habilitation (HDR in French) and Ph.D. in Computer Science, respectively in 2012 from Université de Lille 1 and in 2004 from Université de Rennes 1. He was previously member of [LIFL](http://www.lifl.fr/)computer science laboratory (Villeneuve D'Ascq - France) and [Inria](http://www.inria.fr/index.en.html) Lille - Nord Europe research center (France) from 2006 to 2012. Before this period, he had been member of [IRISA](http://www.irisa.fr/en) computer science laboratory (Rennes - France) where he worked on multi-clock synchronous design and analysis of real-time embedded systems in the avionics domain from 1999 to 2005.

Publications

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Improving the Performance of STT-MRAM LLC through Enhanced Cache Replacement Policy

Pierre-Yves Péneau , David Novo , Florent Bruguier , Lionel Torres , Gilles Sassatelli
ARCS: Architecture of Computing Systems, Apr 2018, Braunschweig, Germany. pp.168-180, ⟨10.1007/978-3-319-77610-1_13⟩
Communication dans un congrès lirmm-01669254v2
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Using multifunctional standardized stack as universal spintronic technology for IoT

Mehdi B. Tahoori , Sarath Mohanachandran Nair , Rajendra Bishnoi , Sophiane Senni , Jad Mohdad
DATE 2018 - 21st Design, Automation and Test in Europe Conference and Exhibition, Mar 2018, Dresden, Germany. pp.931-936, ⟨10.23919/DATE.2018.8342143⟩
Communication dans un congrès hal-01864468v1
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Main memory organization trade-offs with DRAM and STT-MRAM options based on gem5-NVMain simulation frameworks

Manu Komalan , Oh Hyung Rock , Matthias Hartmann , Sushil Sakhare , Christian Tenllado
DATE 2018 - 21st Design, Automation and Test in Europe Conference and Exhibition, Mar 2018, Dresden, Germany. pp.103-108, ⟨10.23919/DATE.2018.8341987⟩
Communication dans un congrès lirmm-01912824v1
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MAGPIE: System-level Evaluation of Manycore Systems with Emerging Memory Technologies

Thibaud Delobelle , Pierre-Yves Péneau , Abdoulaye Gamatié , Florent Bruguier , Sophiane Senni
EMS: Emerging Memory Solutions, Mar 2017, Lausanne, Switzerland
Communication dans un congrès lirmm-01467328v1
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Embedded systems to high performance computing using STT-MRAM

Sophiane Senni , Thibaud Delobelle , Odilia Coi , Pierre-Yves Péneau , Lionel Torres
DATE 2017 - 20th Design, Automation and Test in Europe Conference and Exhibition, Mar 2017, Lausanne, Switzerland. pp.536-541, ⟨10.23919/DATE.2017.7927046⟩
Communication dans un congrès lirmm-01548996v1
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Loop Optimization in Presence of STT-MRAM Caches: a Study of Performance-Energy Tradeoffs

Pierre-Yves Péneau , Rabab Bouziane , Abdoulaye Gamatié , Erven Rohou , Florent Bruguier
PATMOS: Power and Timing Modeling, Optimization and Simulation, Sep 2016, Bremen, Germany. pp.162-169, ⟨10.1109/PATMOS.2016.7833682⟩
Communication dans un congrès hal-01347354v1
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OpenMP scheduling on ARM big.LITTLE architecture

Anastasiia Butko , Louisa Bessad , David Novo , Florent Bruguier , Abdoulaye Gamatié
MULTIPROG 2016 - 9th International Workshop on Programmability and Architectures for Heterogeneous Multicores, HIPEAC, Jan 2016, Prague, Czech Republic
Communication dans un congrès lirmm-01377630v1
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Full-System Simulation of big.LITTLE Multicore Architecture for Performance and Energy Exploration

Anastasiia Butko , Florent Bruguier , Abdoulaye Gamatié , Gilles Sassatelli , David Novo
MCSoC: Embedded Multicore/Many-core Systems-on-Chip, Sep 2016, Lyon, France. pp.201-208, ⟨10.1109/MCSoC.2016.20⟩
Communication dans un congrès lirmm-01418745v1
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Flot automatique d’évaluation pour l’exploration d’architectures à base de mémoires non volatiles

Thibaud Delobelle , Pierre-Yves Péneau , Sophiane Senni , Florent Bruguier , Abdoulaye Gamatié
ComPAS: Conférence en Parallélisme, Architecture et Système, Jul 2016, Lorient, France
Communication dans un congrès lirmm-01345975v1
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Design Exploration for next Generation High-Performance Manycore On-chip Systems: Application to big.LITTLE Architectures

Anastasiia Butko , Abdoulaye Gamatié , Gilles Sassatelli , Lionel Torres , Michel Robert
ISVLSI: International Symposium on Very Large Scale Integration, Jul 2015, Montpellier, France. pp.551-556, ⟨10.1109/ISVLSI.2015.28⟩
Communication dans un congrès lirmm-01255927v1
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Emerging Non-volatile Memory Technologies Exploration Flow for Processor Architecture

Sophiane Senni , Lionel Torres , Gilles Sassatelli , Abdoulaye Gamatié , Bruno Mussard
ISVLSI 2015 - International Symposium on Very Large Scale Integration, Jul 2015, Montpellier, France. pp.460-465, ⟨10.1109/ISVLSI.2015.126⟩
Communication dans un congrès lirmm-01253337v1
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Potential Applications Based on NVM Emerging Technologies

Sophiane Senni , Lionel Torres , Gilles Sassatelli , Abdoulaye Gamatié , Bruno Mussard
DATE 2015 - 18th Design, Automation and Test in Europe Conference and Exhibition, Mar 2015, Grenoble, France. pp.1012-1017, ⟨10.7873/DATE.2015.1120⟩
Communication dans un congrès lirmm-01253332v1