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Vincent Beroulle

4
Documents

Présentation

Vincent Beroulle received an Engineer Degree from the National Polytechnical Institute of Grenoble (INPG) in 1996, and a Master's Degree and a Ph.D. in Microelectronics from the University of Montpellier II, respectively in 1999 and 2002. He is currently a Professor at the Grenoble Institute of Technology. He is head of the LCIS laboratory. His main interest concerns the security and safety of complex integrated circuits and systems. In particular, his work deals with fault modeling and fault injection with emulation platforms with a specific focus on IoT and RFID technologies.

Publications

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Cross-layer Approach to Assess FMEA on Critical Systems and Evaluate High-Level Model Realism

Julie Roux , Katell Morin-Allory , Vincent Beroulle , Régis Leveugle , Gilles Genévrier
29th IFIP/IEEE International Conference on very Large Scale Integration, VLSI-SoC 2021, Oct 2021, Singapour, Singapore
Communication dans un congrès hal-03353865v1

Cross Layer Fault Simulations for Analyzing the Robustness of RTL Designs in Airborne Systems

Julie Roux , Vincent Beroulle , Katell Morin-Allory , Régis Leveugle , Lilian Bossuet
23rd International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), Apr 2020, Novi Sad, Serbia. pp.1-4, ⟨10.1109/DDECS50862.2020.9095559⟩
Communication dans un congrès hal-02937868v1

High Level Fault Injection Method for Evaluating Critical System Parameter Ranges

Julie Roux , Vincent Beroulle , Katell Morin-Allory , Régis Leveugle , Lilian Bossuet
2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Nov 2020, Glasgow, United Kingdom. pp.1-4, ⟨10.1109/ICECS49266.2020.9294821⟩
Communication dans un congrès hal-03136621v1