- 1
- 1
VB
Vincent Beroulle
2
Documents
Présentation
Vincent Beroulle received an Engineer Degree from the National Polytechnical Institute of Grenoble (INPG) in 1996, and a Master's Degree and a Ph.D. in Microelectronics from the University of Montpellier II, respectively in 1999 and 2002. He is currently a Professor at the Grenoble Institute of Technology. He is head of the LCIS laboratory. His main interest concerns the security and safety of complex integrated circuits and systems. In particular, his work deals with fault modeling and fault injection with emulation platforms with a specific focus on IoT and RFID technologies.
Publications
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 2
|
|
Cross-layer analysis of software fault models and countermeasures against hardware fault attacks in a RISC-V processorMicroprocessors and Microsystems: Embedded Hardware Design , 2019, 71, pp.102862. ⟨10.1016/j.micpro.2019.102862⟩
Article dans une revue
hal-02426107v1
|
|
|
A hybrid solution for constrained devices to detect microarchitectural attacksEuroS&P 2023 - 8th IEEE European Symposium on Security and Privacy, Jul 2023, Delft, Netherlands
Communication dans un congrès
hal-04149021v1
|