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Vianney Lapôtre
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Documents
Identifiants chercheurs
vianney-lapotre-
0000-0002-8091-0703
- Google Scholar : https://scholar.google.fr/citations?user=w0aSCHcAAAAJ&hl=fr
- IdRef : 176951911
Présentation
I received my M.Sc. and my Ph.D. in Electrical and Computer Engineering from the University Bretagne Sud, France, in 2010 and 2013 respectively. In 2012 I spent six months as an invited researcher at the Ruhr-University of Bochum, Germany. From 2013 to 2014, I was a Postdoctoral at LIRMM, Montpellier, France. I was involved in the European Mont-Blanc project. I am currently associate professor at University Bretagne Sud, France. My research interests include hardware security, embedded processors and reconfigurable hardware architectures.
I received my M.Sc. and my Ph.D. in Electrical and Computer Engineering from the University Bretagne Sud, France, in 2010 and 2013 respectively. In 2012 I spent six months as an invited researcher at the Ruhr-University of Bochum, Germany. From 2013 to 2014, I was a Postdoctoral at LIRMM, Montpellier, France. I was involved in the European Mont-Blanc project. I am currently associate professor at University Bretagne Sud, France. My research interests include hardware security, embedded processors and reconfigurable hardware architectures.
Publications
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Verrouillage des lignes de cache pour la lutte contre les attaques par canaux auxiliaires exploitant les mémoires cachesCyber On Board, Mar 2024, ile des Embiez, France
Communication dans un congrès
hal-04461273v1
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On The Effect of Replacement Policies on The Security of Randomized Cache Architectures19th ACM ASIA Conference on Computer and Communications Security (ACM ASIACCS 2024), Jul 2024, Singapore, Singapore
Communication dans un congrès
hal-04427321v1
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Cache locking against cache-based side-channel attacksÉcole d'hiver Francophone sur les Technologies de Conception des Systèmes Embarqués Hétérogènes (FETCH), Université Libre de Bruxelles, Feb 2024, Maillen, Belgium
Communication dans un congrès
hal-04446221v1
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Work in Progress: Thwarting Timing Attacks in Microcontrollers using Fine-grained Hardware Protections2023 IEEE European Symposium on Security and Privacy Workshops (EuroS&PW), Jul 2023, Delft, Netherlands. pp.1-7
Communication dans un congrès
hal-04155139v1
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A small and adaptive coprocessor for information flow tracking in ARM SoCsReConFig 2018 - International Conference on Reconfigurable Computing and FPGAs, Dec 2018, Cancun, Mexico. pp.1-17, ⟨10.1109/reconfig.2018.8641695⟩
Communication dans un congrès
hal-01911619v1
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A novel lightweight hardware-assisted static instrumentation approach for ARM SoC using debug componentsAsianHOST 2018 - Asian Hardware Oriented Security and Trust Symposium, Dec 2018, Hong Kong, China. pp.1-13, ⟨10.1109/asianhost.2018.8607177⟩
Communication dans un congrès
hal-01911621v1
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ARMHEx: embedded security through hardware-enhanced information flow trackingRESSI 2017 : Rendez-vous de la Recherche et de l'Enseignement de la Sécurité des Systèmes d'Information, May 2017, Grenoble (Autrans), France
Communication dans un congrès
hal-01558155v1
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ARMHEx: A hardware extension for DIFT on ARM-based SoCs2017 27th International Conference on Field Programmable Logic and Applications (FPL), Sep 2017, Ghent, Belgium. ⟨10.23919/fpl.2017.8056767⟩
Communication dans un congrès
hal-01558473v1
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A portable approach for SoC-based Dynamic Information Flow Tracking implementations11ème Colloque du GDR SoC/SiP, Jun 2016, Nantes, France
Communication dans un congrès
hal-01311045v1
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Towards a hardware-assisted information flow tracking ecosystem for ARM processors26th International Conference on Field-Programmable Logic and Applications (FPL 2016), Aug 2016, Lausanne, Switzerland. ⟨10.1109/fpl.2016.7577396⟩
Communication dans un congrès
hal-01337579v1
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ARMHEx: a framework for efficient DIFT in real-world SoCsPoster de conférence hal-01558475v1 |
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HardBlare: a Hardware-Assisted Approach for Dynamic Information Flow TrackingSéminaire des doctorantes et doctorants en informatique de la Société Informatique de France, Apr 2016, Paris, France. 2016
Poster de conférence
hal-01311032v1
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HardBlare: an efficient hardware-assisted DIFC for non-modified embedded processorsCHES 2015 - Workshop on Cryptographic Hardware and Embedded Systems, Sep 2015, Saint-Malo, France. 2015
Poster de conférence
hal-01252597v1
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