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Vianney Lapôtre
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Documents
Identifiants chercheurs
vianney-lapotre-
0000-0002-8091-0703
- Google Scholar : https://scholar.google.fr/citations?user=w0aSCHcAAAAJ&hl=fr
- IdRef : 176951911
Présentation
I received my M.Sc. and my Ph.D. in Electrical and Computer Engineering from the University Bretagne Sud, France, in 2010 and 2013 respectively. In 2012 I spent six months as an invited researcher at the Ruhr-University of Bochum, Germany. From 2013 to 2014, I was a Postdoctoral at LIRMM, Montpellier, France. I was involved in the European Mont-Blanc project. I am currently associate professor at University Bretagne Sud, France. My research interests include hardware security, embedded processors and reconfigurable hardware architectures.
I received my M.Sc. and my Ph.D. in Electrical and Computer Engineering from the University Bretagne Sud, France, in 2010 and 2013 respectively. In 2012 I spent six months as an invited researcher at the Ruhr-University of Bochum, Germany. From 2013 to 2014, I was a Postdoctoral at LIRMM, Montpellier, France. I was involved in the European Mont-Blanc project. I am currently associate professor at University Bretagne Sud, France. My research interests include hardware security, embedded processors and reconfigurable hardware architectures.
Publications
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Sherlock Holmes of Cache Side-Channel Attacks in Intel's x86 ArchitectureIEEE-Communications and Network Security, Jun 2019, Washington DC, United States
Communication dans un congrès
hal-02151838v1
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Cache-Based Side-Channel Intrusion Detection using Hardware Performance CountersCryptArchi 2018 - 16th International Workshops on Cryptographic architectures embedded in logic devices, Jun 2018, Lorient, France
Communication dans un congrès
cel-01824512v1
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Run-time Detection of Prime+Probe Side-Channel Attack on AES Encryption AlgorithmGlobal Information Infrastructure and Networking Symposium (GIIS), Oct 2018, Thessaloniki, Greece
Communication dans un congrès
hal-01879950v1
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NIGHTs-WATCH: A Cache-based Side-channel Intrusion Detector Using Hardware Performance Counters7th International Workshop on Hardware and Architectural Support for Security and Privacy, Jun 2018, Los Angeles, United States. ⟨10.1145/3214292.3214293⟩
Communication dans un congrès
hal-01806729v1
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Machine Learning For Security: The Case of Side-Channel Attack Detection at Run-timeICECS-2018, Dec 2018, Bordeaux, France
Communication dans un congrès
hal-01876792v1
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Improving Confidentiality Against Cache-based SCAsACM WomENcourage, Sep 2017, barcelona, France
Communication dans un congrès
hal-01748057v1
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