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Vianney Lapôtre
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Documents
Identifiants chercheurs
vianney-lapotre-
0000-0002-8091-0703
- Google Scholar : https://scholar.google.fr/citations?user=w0aSCHcAAAAJ&hl=fr
- IdRef : 176951911
Présentation
I received my M.Sc. and my Ph.D. in Electrical and Computer Engineering from the University Bretagne Sud, France, in 2010 and 2013 respectively. In 2012 I spent six months as an invited researcher at the Ruhr-University of Bochum, Germany. From 2013 to 2014, I was a Postdoctoral at LIRMM, Montpellier, France. I was involved in the European Mont-Blanc project. I am currently associate professor at University Bretagne Sud, France. My research interests include hardware security, embedded processors and reconfigurable hardware architectures.
I received my M.Sc. and my Ph.D. in Electrical and Computer Engineering from the University Bretagne Sud, France, in 2010 and 2013 respectively. In 2012 I spent six months as an invited researcher at the Ruhr-University of Bochum, Germany. From 2013 to 2014, I was a Postdoctoral at LIRMM, Montpellier, France. I was involved in the European Mont-Blanc project. I am currently associate professor at University Bretagne Sud, France. My research interests include hardware security, embedded processors and reconfigurable hardware architectures.
Publications
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Dynamic configuration management of a multi-standard and multi-mode reconfigurable multi-ASIP architecture for turbo decodingEURASIP Journal on Advances in Signal Processing, 2017, 2017 (1), ⟨10.1186/s13634-017-0468-x⟩
Article dans une revue
hal-01595772v1
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A Dynamically Reconfigurable Multi-ASIP Architecture for Multistandard and Multimode Turbo DecodingIEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2016, 24 (1), pp.383 - 387. ⟨10.1109/TVLSI.2015.2396941⟩
Article dans une revue
hal-01121754v1
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Plateforme multi-ASIP reconfigurable dynamiquement pour le turbo décodage dans un contexte multi-standardGRETSI 2013 : 24ème colloque du Groupement de Recherche en Traitement du Signal et des Images, Sep 2013, Brest, France
Communication dans un congrès
hal-00876009v1
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Rapid Design and Prototyping of a Reconfigurable Decoder Architecture for QC-LDPC CodesRSP 2013 : 24th IEEE International Symposium on Rapid System Prototyping, Oct 2013, Montreal, Canada
Communication dans un congrès
hal-00876088v1
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A reconfigurable multi-standard ASIP-based turbo decoder for an efficient dynamic reconfiguration in a multi-ASIPISVLSI 2013 : IEEE Computer Society Annual Symposium on VLSI, Aug 2013, Natal, Brazil. ⟨10.1109/ISVLSI.2013.6654620⟩
Communication dans un congrès
hal-01002828v1
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An efficient on-chip configuration infrastructure for a flexible multi-ASIP turbo decoder architectureReCoSoC 2013 : 8th IEEE International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip, Jul 2013, Darmstadt, Germany. ⟨10.1109/ReCoSoC.2013.6581518⟩
Communication dans un congrès
hal-00873978v1
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Stopping-free dynamic configuration of a multi-ASIP turbo decoderDSD 2013 : 16th Euromicro Conference on Digital System Design, Sep 2013, Santander, Spain. pp.155 - 162
Communication dans un congrès
hal-00876005v1
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Optimizations for an efficient reconfiguration of an ASIP-based turbo decoderISCAS 2013 : IEEE International Symposium on Circuits and Systems, May 2013, Beijing, Chine. pp.493 - 496, ⟨10.1109/ISCAS.2013.6571888⟩
Communication dans un congrès
hal-00873979v1
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An analytical approach for sizing of heterogeneous multiprocessor flexible platform for iterative demapping and channel decodingInternational Conference on ReConFigurable Computing and FPGAs (Reconfig), Dec 2012, Cancun, Mexico. ⟨10.1109/ReConFig.2012.6416728⟩
Communication dans un congrès
hal-00747714v1
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Management of reconfigurable multi-standards ASIP-based receiverSOC-SIP : colloque national du groupe de recherches System On Chip - System In Package, Jun 2011, Lyon, France
Communication dans un congrès
hal-00724998v1
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Efficient dynamic configuration of a multi-ASIP turbo decoderGDR SoC-SiP 2013 : Colloque National du Groupe de Recherche System on Chip -System in Package, Jun 2013, Lyon, France
Poster de conférence
hal-00876017v1
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