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Aida Todri-Sanial


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Article dans une revue15 documents

  • Aida Todri-Sanial, Yuanqing Cheng. A Study of 3-D Power Delivery Networks With Multiple Clock Domains. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEEE, 2016, 24 (11), pp.3218-3231. 〈10.1109/TVLSI.2016.2549275〉. 〈lirmm-01446137〉
  • Yuanqing Cheng, Aida Todri-Sanial, Jianlei Yang, Weisheng Zhao. Alleviating Through-Silicon-Via Electromigration for 3-D Integrated Circuits Taking Advantage of Self-Healing Effect. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEEE, 2016, 24 (11), pp.3310-3322. 〈10.1109/TVLSI.2016.2543260〉. 〈lirmm-01446125〉
  • Bi Wu, Yuanqing Cheng, Jianlei Yang, Aida Todri-Sanial, Weisheng Zhao. Temperature Impact Analysis and Access Reliability Enhancement for 1T1MTJ STT-RAM. IEEE Transactions on Reliability, Institute of Electrical and Electronics Engineers, 2016, 65 (4), pp.1755-1768. 〈10.1109/TR.2016.2608910〉. 〈lirmm-01446148〉
  • Alessandro Magnani, Massimiliano De Magistris, Aida Todri-Sanial, Antonio Maffucci. Electrothermal Analysis of Carbon Nanotubes Power Delivery Networks for Nanoscale Integrated Circuits. IEEE Transactions on Nanotechnology, Institute of Electrical and Electronics Engineers, 2016, 15 (3), pp.380-388. 〈10.1109/TNANO.2016.2535390〉. 〈lirmm-01445865〉
  • Aida Todri-Sanial, Sanjukta Bhanja. Special Issue on Advances in Design of Ultra-Low Power Circuits and Systems in Emerging Technologies. ACM Journal on Emerging Technologies in Computing Systems, Association for Computing Machinery, 2015, Guest Editorial, 12 (2), pp.#11. 〈10.1145/2756554〉. 〈lirmm-01255756〉
  • Aida Todri-Sanial, Sandip Kundu, Patrick Girard, Alberto Bosio, Luigi Dilillo, et al.. Globally Constrained Locally Optimized 3-D Power Delivery Networks. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEEE, 2014, 22 (10), pp.2131-2144. 〈10.1109/TVLSI.2013.2283800〉. 〈lirmm-01255754〉
  • João Azevedo, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, et al.. A Complete Resistive-Open Defect Analysis for Thermally Assisted Switching MRAMs. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEEE, 2014, 22 (11), pp.2326-2335. 〈10.1109/TVLSI.2013.2294080〉. 〈lirmm-01248578〉
  • Georgios Tsiligiannis, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, et al.. Multiple Cell Upset Classification in Commercial SRAMs. IEEE Transactions on Nuclear Science, Institute of Electrical and Electronics Engineers, 2014, 61 (4), pp.1747-1754. 〈http://ieeexplore.ieee.org/Xplore/home.jsp〉. 〈10.1109/TNS.2014.2313742〉. 〈lirmm-01234446〉
  • Georgios Tsiligiannis, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, et al.. An SRAM Based Monitor for Mixed-Field Radiation Environments. IEEE Transactions on Nuclear Science, Institute of Electrical and Electronics Engineers, 2014, 61 (4), pp.1663-1670. 〈http://ieeexplore.ieee.org/Xplore/home.jsp〉. 〈10.1109/TNS.2014.2299733〉. 〈lirmm-01234441〉
  • Georgios Tsiligiannis, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, et al.. Evaluating a Radiation Monitor for Mixed-Field Environments based on SRAM Technology. Journal of Instrumentation, IOP Publishing, 2014, 9, 〈10.1088/1748-0221/9/05/C05052〉. 〈lirmm-01234448〉
  • Aida Todri-Sanial, Sandip Kundu, Patrick Girard, Alberto Bosio, Luigi Dilillo, et al.. A Study of Tapered 3-D TSVs for Power and Thermal Integrity. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEEE, 2013, 21 (2), pp.306-319. 〈10.1109/TVLSI.2012.2187081〉. 〈lirmm-00806776〉
  • Aida Todri, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel. Uncorrelated Power Supply Noise and Ground Bounce Consideration for Test Pattern Generation. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEEE, 2013, 21 (5), pp.958-970. 〈10.1109/TVLSI.2012.2197427〉. 〈lirmm-00806774〉
  • Georgios Tsiligiannis, Luigi Dilillo, Alberto Bosio, Patrick Girard, Aida Todri, et al.. Testing a Commercial MRAM under Neutron and Alpha Radiation in Dynamic Mode. IEEE Transactions on Nuclear Science, Institute of Electrical and Electronics Engineers, 2013, 60 (4), pp.2617-2622. 〈10.1109/TNS.2013.2239311〉. 〈lirmm-00805005〉
  • Aida Todri, Malgorzata Marek-Sadowska. Power Delivery for Multicore Systems. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEEE, 2011, 19 (12), pp.2243-2255. 〈10.1109/TVLSI.2010.2080694〉. 〈lirmm-01248575〉
  • Aida Todri, L. Perera, R. Rivera, S. Kwan. Reliability and Performance Studies of DC-DC Conversion Powering Scheme for the CMS Pixel Tracker at SLHC. Journal of Instrumentation, IOP Publishing, 2010, 5 (C12010), 〈10.1088/1748-0221/5/12/C12010〉. 〈lirmm-01255752〉

Communication dans un congrès81 documents

  • Aida Todri-Sanial. Toward Carbon Nanotube Computing. Emerging Technology, May 2017, Varsovie, Poland. CMOS Emerging Technology Research Symposium, 2017, 〈http://www.etcmos.com/current_event.php?event=2017〉. 〈lirmm-01457269〉
  • Aida Todri-Sanial. Electrothermal Modeling and Analysis of Carbon Nanotube Interconnects. PATMOS: Power And Timing Modeling, Optimization and Simulation, Sep 2016, Brême, Germany. 26th International Workshop on Power And Timing Modeling, Optimization and Simulation, 2016, 〈http://www.item.uni-bremen.de/patmos/〉. 〈lirmm-01457256〉
  • Aida Todri-Sanial. Modeling and Simulation of Carbon Nanotube Interconnects. SISPAD: Simulation of Semiconductor Processes and Devices, Sep 2016, Nuremberg, Germany. 21st International Conference on Simulation of Semiconductor Processes and Devices, 2016, 〈http://www.sispad2016.org〉. 〈lirmm-01457260〉
  • Jie Liang, Liuyang Zhang, Nadine Azemard, Pascal Nouet, Aida Todri-Sanial. Physical description and analysis of doped carbon nanotube interconnects. PATMOS: Power and Timing Modeling, Optimization and Simulation, Sep 2016, Brême, Germany. IEEE, 26th IEEE International Workshop on Power and Timing Modeling, Optimization and Simulation, pp.250-255, 2016, 〈10.1109/PATMOS.2016.7833695〉. 〈lirmm-01457338〉
  • Aida Todri-Sanial. Investigation of electrical and thermal properties of carbon nanotube interconnects. PATMOS: Power and Timing Modeling, Optimization and Simulation, Sep 2016, Brême, Zimbabwe. IEEE, 26th International Workshop on Power and Timing Modeling, Optimization and Simulation, pp.25-32, 2016, 〈10.1109/PATMOS.2016.7833421〉. 〈lirmm-01457289〉
  • Aida Todri-Sanial, Alessandro Magnani, Massimiliano De Magistris, Antonio Maffucci. Present and future prospects of carbon nanotube interconnects for energy efficient integrated circuits. EuroSimE: Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, Apr 2016, Montpellier, France. 17th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, 2016, 〈https://www.eurosime.org/b16.htm〉. 〈10.1109/EuroSimE.2016.7463379〉. 〈lirmm-01446241〉
  • Liuyang Zhang, Yuanqing Cheng, Wang Kang, Youguang Zhang, Lionel Torres, et al.. Reliability and performance evaluation for STT-MRAM under temperature variation. EuroSimE: Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, Apr 2016, Montpellier, France. 17th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, pp.1-4, 2016, 〈10.1109/EuroSimE.2016.7463380〉. 〈lirmm-01446252〉
  • Liuyang Zhang, Aida Todri-Sanial, Wang Kang, Youguang Zhang, Lionel Torres, et al.. Quantitative evaluation of reliability and performance for STT-MRAM. ISCAS: International Symposium on Circuits and Systems, May 2016, Montréal, QC, Canada. IEEE, http://iscas2016.org, pp.1150-1153, 2016, 〈http://iscas2016.org〉. 〈10.1109/ISCAS.2016.7527449〉. 〈lirmm-01446275〉
  • Alessandro Magnani, Massimiliano De Magistris, Antonio Maffucci, Aida Todri-Sanial. A clustering technique for fast electrothermal analysis of on-chip power distribution networks. SPI: Signal and Power Integrity, May 2016, Turin, Italy. IEEE, IEEE 20th Workshop on Signal and Power Integrity, pp.1-4, 2016, 〈http://www.spi2016.org〉. 〈10.1109/SaPIW.2016.7496292〉. 〈lirmm-01446283〉
  • Nicolas Jeanniot, Aida Todri-Sanial, Pascal Nouet, Gaël Pillonnet, Hervé Fanet. Investigation of the power-clock network impact on adiabatic logic. SPI: Signal and Power Integrity, May 2016, Turin, Italy. 2016 IEEE 20th Workshop on Signal and Power Integrity (SPI) pp.1-4, 2016, 〈http://www.spi2016.org/〉. 〈10.1109/SaPIW.2016.7496270〉. 〈hal-01348476〉
  • Kheirallah Rida, Jean-Marc Galliere, Aida Todri-Sanial, Gilles Ducharme, Nadine Azemard. Statistical Energy Study for 28nm FDSOI Devices. EuroSimE: Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, Apr 2015, Budapest, Hungary. Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE), 2015 16th International Conference on, 2015, 〈10.1109/EuroSimE.2015.7103149〉. 〈lirmm-01168602〉
  • Charles Effiong, Vianney Lapotre, Abdoulaye Gamatié, Gilles Sassatelli, Aida Todri-Sanial, et al.. On the Performance Exploration of 3D NoCs with Resistive-Open TSVs. ISVLSI: IEEE Computer Society Annual Symposium on VLSI, Jul 2015, Montpellier, France. pp.579-584, 2015, 〈10.1109/ISVLSI.2015.49〉. 〈lirmm-01248588〉
  • Alessandro Magnani, M. De Magistris, Antonio Maffucci, Aida Todri-Sanial. A node clustering reduction scheme for power grids electrothermal analysis. SPI: Signal and Power Integrity, May 2015, Berlin, Germany. Signal and Power Integrity (SPI), 2015 IEEE 19th Workshop on, pp.1-4, 2015, 〈10.1109/SaPIW.2015.7237399〉. 〈lirmm-01248589〉
  • Lun Yang, Yuanqing Cheng, Yuhao Wang, Hao Yu, Weisheng Zhao, et al.. A body-biasing of readout circuit for STT-RAM with improved thermal reliability. ISCAS: International Symposium on Circuits and Systems, May 2015, Lisbon, Portugal. pp.1530-1533, 2015, 〈10.1109/ISCAS.2015.7168937〉. 〈lirmm-01248587〉
  • Bi Wu, Yuanqing Cheng, Ying Wang, Aida Todri-Sanial, Guangyu Sun, et al.. An architecture-level cache simulation framework supporting advanced PMA STT-MRAM. NANOARCH: Nanoscale Architectures, Jun 2015, Boston, MA, United States. Nanoscale Architectures (NANOARCH), 2015 IEEE/ACM International Symposium on, pp.7-12, 2015, 〈10.1109/NANOARCH.2015.7180576〉. 〈lirmm-01248586〉
  • Alessandro Magnani, Massimiliano De Magistris, Aida Todri-Sanial, Antonio Maffucci. Carbon-based Power Delivery Networks for nanoscale ICs: electrothermal performance analysis. IEEE-NANO: Nanotechnology, Jul 2015, Rome, Italy. IEEE, 15th IEEE International Conference on Nanotechnology, pp.416-419, 2016, 〈http://www.ieeenano15.org/〉. 〈10.1109/NANO.2015.7388625〉. 〈lirmm-01446739〉
  • Aida Todri-Sanial. Carbon nanotube interconnects for energy-efficient integrated circuits. TNT: Trends in Nanotechnology, Sep 2015, Toulouse, France. 16th International Conference on Trends in Nanotechnology (TNT2015), 2015. 〈lirmm-01446233〉
  • Ghizlane Mouslih, Aida Todri-Sanial, Pascal Nouet. On Analysis of On-chip DC-DC Converters for Power Delivery Networks. ISVLSI: IEEE Computer Society Annual Symposium on VLSI, Jul 2015, Montpellier, France. IEEE, IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp.557-560, 2015, 〈10.1109/ISVLSI.2015.96〉. 〈lirmm-01446182〉
  • Georgios Tsiligiannis, Luigi Dilillo, Viyas Gupta, Alberto Bosio, Patrick Girard, et al.. Efficient Dynamic Test Methods for COTS SRAMs Under Heavy Ion Irradiation. NSREC: Nuclear and Space Radiation Effects Conference, Jul 2014, Paris, France. IEEE Nuclear & Space Radiation Effects Conference (NSREC 2014), 2014. 〈lirmm-01237660〉
  • Georgios Tsiligiannis, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, et al.. Real-Time Testing of 90nm COTS SRAMs at Concordia Station in Antarctica. NSREC: Nuclear and Space Radiation Effects Conference, Jul 2014, Paris, France. IEEE Nuclear & Space Radiation Effects Conference (NSREC 2014), 2014, 〈http://ieee-npss.org/wp-content/uploads/2014/03/2014-NSREC.pdf〉. 〈lirmm-01237709〉
  • Xiaolong Zhang, Yuanqing Cheng, Weisheng Zhao, Youguang Zhang, Aida Todri-Sanial. Exploring potentials of perpendicular magnetic anisotropy STT-MRAM for cache design. Solid-State and Integrated Circuit Technology (ICSICT), 2014 12th IEEE International Conference on, 2014, Unknown, Unknown or Invalid Region. pp.1-3, 2014, 〈10.1109/ICSICT.2014.7021342〉. 〈lirmm-01248593〉
  • Aymen Touati, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri-Sanial, et al.. A Comprehensive Evaluation of Functional Programs for Power-Aware Test. NATW: North Atlantic Test Workshop, May 2014, Johnson City, NY, United States. IEEE, Test Workshop (NATW), 2014 IEEE 23rd North Atlantic, pp.69-72, 2014, 〈10.1109/NATW.2014.23〉. 〈lirmm-01248597〉
  • Carolina Metzler, Aida Todri-Sanial, Alberto Bosio, Luigi Dilillo, Patrick Girard, et al.. Timing-aware ATPG for critical paths with multiple TSVs. DDECS: Design and Diagnostics of Electronic Circuits and Systems, Apr 2014, Warsaw, Poland. IEEE, Design and Diagnostics of Electronic Circuits & Systems, 17th International Symposium on, pp.116-121, 2014, 〈10.1109/DDECS.2014.6868774〉. 〈lirmm-01248600〉
  • Miroslav Valka, Alberto Bosio, Luigi Dilillo, Aida Todri-Sanial, Arnaud Virazel, et al.. Test and diagnosis of power switches. DDECS: Design and Diagnostics of Electronic Circuits and Systems, Apr 2014, Warsaw, Poland. Design and Diagnostics of Electronic Circuits Systems, 17th International Symposium on, pp.213-218, 2014, 〈10.1109/DDECS.2014.6868792〉. 〈lirmm-01248590〉
  • Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri-Sanial, Stefano Bernabovi, et al.. An intra-cell defect grading tool. DDECS: Design and Diagnostics of Electronic Circuits and Systems, Apr 2014, Warsaw, Poland. Design and Diagnostics of Electronic Circuits & Systems, 17th International Symposium on, pp.298-301, 2014, 〈10.1109/DDECS.2014.6868814〉. 〈lirmm-01248591〉
  • Anu Asokan, Aida Todri-Sanial, Alberto Bosio, Luigi Dilillo, Patrick Girard, et al.. A Delay Probability Metric for Input Pattern Ranking Under Process Variation and Supply Noise. ISVLSI: IEEE Computer Society Annual Symposium on VLSI, Jul 2014, Tampa, FL, United States. VLSI (ISVLSI), 2014 IEEE Computer Society Annual Symposium on, pp.226-231, 2014, 〈10.1109/ISVLSI.2014.42〉. 〈lirmm-01248592〉
  • Anelise Kologeski, Fernanda Lima Kastensmidt, Vianney Lapotre, Abdoulaye Gamatié, Gilles Sassatelli, et al.. Performance exploration of partially connected 3D NoCs under manufacturing variability. NEWCAS: International New Circuits and Systems Conference, Jun 2014, Trois-Rivieres, QC, Canada. IEEE, New Circuits and Systems Conference (NEWCAS), 2014 IEEE 12th International, pp.61-64, 2014, 〈10.1109/NEWCAS.2014.6933985〉. 〈lirmm-01248595〉
  • Yuanqing Cheng, Aida Todri-Sanial, Alberto Bosio, Luigi Dilillo, Patrick Girard, et al.. Power supply noise-aware workload assignments for homogeneous 3D MPSoCs with thermal consideration. ASP-DAC: Asia and South Pacific Design Automation Conference, Jan 2014, Singapore, Singapore. pp.544-549, 2014, Design Automation Conference (ASP-DAC), 2014 19th Asia and South Pacific. 〈10.1109/ASPDAC.2014.6742948〉. 〈lirmm-01248596〉
  • Imran Wali, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, et al.. Protecting combinational logic in pipelined microprocessor cores against transient and permanent faults. DDECS: Design and Diagnostics of Electronic Circuits and Systems, Apr 2014, Warsaw, Poland. Design and Diagnostics of Electronic Circuits Systems, 17th International Symposium on, pp.223-225, 2014, 〈10.1109/DDECS.2014.6868794〉. 〈lirmm-01248598〉
  • Anu Asokan, Aida Todri-Sanial, Alberto Bosio, Luigi Dilillo, Patrick Girard, et al.. Path delay test in the presence of multi-aggressor crosstalk, power supply noise and ground bounce. DDECS: Design and Diagnostics of Electronic Circuits and Systems, Apr 2014, Warsaw, Poland. IEEE, Design and Diagnostics of Electronic Circuits & Systems, 17th International Symposium on, pp.207-212, 2014, 〈10.1109/DDECS.2014.6868791〉. 〈lirmm-01248599〉
  • Miroslav Valka, Alberto Bosio, Luigi Dilillo, Aida Todri-Sanial, Arnaud Virazel, et al.. iBoX — Jitter based Power Supply Noise sensor. ETS: European Test Symposium, May 2014, Paderborn, United States. Test Symposium (ETS), 2014 19th IEEE European, pp.1-2, 2014, 〈10.1109/ETS.2014.6847830〉. 〈lirmm-01248601〉
  • Carolina Metzler, Aida Todri-Sanial, Alberto Bosio, Luigi Dilillo, Patrick Girard, et al.. TSV aware timing analysis and diagnosis in paths with multiple TSVs. ISVLSI: IEEE Computer Society Annual Symposium on VLSI, Apr 2014, Napa, CA, United States. VLSI Test Symposium (VTS), 2014 IEEE 32nd, pp.1-6, 2014, 〈10.1109/VTS.2014.6818772〉. 〈lirmm-01248594〉
  • Leonardo Zordan, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri-Sanial, et al.. On the Reuse of Read and Write Assist Circuits to Improve Test Efficiency in Low-Power SRAMs. ITC: International Test conference, Sep 2013, Anaheim, CA, United States. pp.1-10, 2013, 〈http://www.itctestweek.org/〉. 〈10.1109/TEST.2013.6651927〉. 〈lirmm-00818977〉
  • Ioana Vatajelu, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri-Sanial, et al.. Analyzing Resistive-Open Defects in SRAM Core-Cell under the Effect of Process Variability. ETS: European Test Symposium, May 2013, Avignon, France. Test Symposium (ETS), 2013 18th IEEE European, pp.1-6, 2013, 〈10.1109/ETS.2013.6569373〉. 〈lirmm-00805360〉
  • Leonardo Zordan, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri-Sanial, et al.. A Built-in Scheme for Testing and Repairing Voltage Regulators of Low-Power SRAMs. VTS: VLSI Test Symposium, Apr 2013, Berkeley, CA, United States. pp.1-6, 2013, VLSI Test Symposium (VTS), 2013 IEEE 31st. 〈http://www.tttc-vts.org/public_html/new/2013/index.php〉. 〈10.1109/VTS.2013.6548894〉. 〈lirmm-00805366〉
  • Georgios Tsiligiannis, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, et al.. SEU Monitoring in Mixed-Field Radiation Environments of Particle Accelerators. RADECS: Radiation and Its Effects on Components and Systems, Sep 2013, Oxford, United Kingdom. 14th European Conference on Radiation and Its Effects on Components and Systems, pp.1-4, 2013, 〈10.1109/RADECS.2013.6937419〉. 〈lirmm-00839085〉
  • Zhenzhou Sun, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri-Sanial, et al.. Effect-Cause Intra-Cell Diagnosis at Transistor Level. ISQED: International Symposium on Quality Electronic Design, Mar 2013, Santa Clara, CA, United States. 14th International Symposium on Quality Electronic Design, pp.460-467, 2013, 〈http://www.isqed.org/〉. 〈10.1109/ISQED.2013.6523652〉. 〈lirmm-00817224〉
  • Leonardo Zordan, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri-Sanial, et al.. Test Solution for Data Retention Faults in Low-Power SRAMs. EDA Association. DATE: Design, Automation and Test in Europe, Mar 2013, Grenoble, France. Design, Automation & Test in Europe Conference & Exhibition, pp.442-447, 2013, 〈http://www.date-conference.com/〉. 〈10.7873/DATE.2013.099〉. 〈lirmm-00805140〉
  • Georgios Tsiligiannis, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, et al.. Temperature Impact on the Neutron SER of a Commercial 90nm SRAM. NSREC: Nuclear and Space Radiation Effects Conference, Jul 2013, San Francisco, Ca, United States. IEEE, pp.1-4, 2013, 〈http://www.nsrec.com/〉. 〈lirmm-00805291〉
  • Georgios Tsiligiannis, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, et al.. Characterization of an SRAM Based Particle Detector For Mixed-Field Radiation Environments. IWASI: International Workshop on Advances in Sensors and Interfaces, Jun 2013, Bari, Italy. 5th IEEE International Workshop on Advances in Sensors and Interfaces, pp.75-80, 2013, 〈10.1109/IWASI.2013.6576070〉. 〈lirmm-00839046〉
  • Georgios Tsiligiannis, Ioana Vatajelu, Luigi Dilillo, Alberto Bosio, Patrick Girard, et al.. SRAM Soft Error Rate Evaluation Under Atmospheric Neutron Radiation and PVT variations. IOLTS: International On-Line Testing Symposium, Jul 2013, Chania, Crete, Greece. On-Line Testing Symposium (IOLTS), 2013 IEEE 19th International, pp.145-150, 2013, 〈http://tima.imag.fr/conferences/iolts/iolts13/〉. 〈10.1109/IOLTS.2013.6604066〉. 〈lirmm-00818955〉
  • Ioana Vatajelu, Georgios Tsiligiannis, Luigi Dilillo, Alberto Bosio, Patrick Girard, et al.. On the correlation between Static Noise Margin and Soft Error Rate evaluated for a 40nm SRAM cell. DFT: Defect and Fault Tolerance in VLSI and Nanotechnology Systems, Oct 2013, New York, United States. Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2013 IEEE International Symposium on, pp.143-148, 2013, 〈http://www.dfts.org/dft13/〉. 〈10.1109/DFT.2013.6653597〉. 〈lirmm-01238413〉
  • Georgios Tsiligiannis, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, et al.. Multiple-Cell-Upsets on a commercial 90nm SRAM in Dynamic Mode. RADECS: Radiation and Its Effects on Components and Systems, Sep 2013, Oxford, United Kingdom. 14th European Conference on Radiation and Its Effects on Components and Systems, pp.1-4, 2013, 〈10.1109/RADECS.2013.6937429〉. 〈lirmm-00839062〉
  • Zhenzhou Sun, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, et al.. Improving Defect Localization Accuracy by means of Effect-Cause Intra-Cell Diagnosis at Transistor Level. SDD: Silicon Debug and Diagnosis, Sep 2013, Anaheim, CA, United States. 8th IEEE International Workshop on Silicon Debug and Diagnosis, 2013, 〈http://sdd.tttc-events.org/13/〉. 〈lirmm-00806872〉
  • João Azevedo, Arnaud Virazel, Yuanqing Cheng, Alberto Bosio, Luigi Dilillo, et al.. Performance Characterization of TAS-MRAM Architectures in Presence of Capacitive Defects. VALID: Advances in Systems Testing and Validation Lifecycle, Oct 2013, Venice, Italy. 5th International Conference on Advances in Systems Testing and Validation Lifecycle, pp.39-44, 2013, 〈https://www.iaria.org/conferences2013/VALID13.html〉. 〈lirmm-01433308〉
  • Carolina Metzler, Aida Todri-Sanial, Alberto Bosio, Luigi Dilillo, Patrick Girard, et al.. Computing Detection Probability of Delay Defects in Signal Line TSVs. ETS: European Test Symposium, May 2013, Avignon, France. Test Symposium (ETS), 2013 18th IEEE, 2013, 〈10.1109/ETS.2013.6569349〉. 〈lirmm-00839044〉
  • Aida Todri-Sanial, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, et al.. Worst-Case Power Supply Noise and Temperature Distribution Analysis for 3D PDNs with Multiple Clock Domains. NEWCAS: New Circuits and Systems, Jun 2013, Paris, France. 11th International IEEE Conference on New Circuits and Systems, 2013, 〈http://newcas2013.org〉. 〈10.1109/NEWCAS.2013.6573628〉. 〈lirmm-00839042〉
  • Yuanqing Cheng, Aida Todri, Alberto Bosio, Luigi Dilillo, Patrick Girard, et al.. Mitigate TSV Electromigration for 3D ICs - From the Architecture Perspective. International Symposium on VLSI, Natale, Brazil. pp.6, 2013. 〈lirmm-00839052〉
  • Aida Todri-Sanial, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel. Fast and Accurate Electro-Thermal Analysis of Three-Dimensional Power Delivery Networks. EuroSimE: Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, Apr 2013, Wroclaw, Poland. Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE), 2013 14th International Conference on, pp.1-4, 2013, 〈10.1109/EuroSimE.2013.6529956〉. 〈lirmm-00839043〉
  • Ioana Vatajelu, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, et al.. Analyzing the effect of concurrent variability in the core cells and sense amplifiers on SRAM read access failures. DTIS: Design and Technology of Integrated Systems in Nanoscale Era, Mar 2013, Abu Dhabi, United Arab Emirates. 8th International Conference on Design Technology of Integrated Systems in Nanoscale Era, pp.39-44, 2013, 〈10.1109/DTIS.2013.6527775〉. 〈lirmm-01248603〉
  • Ioana Vatajelu, Luigi Dilillo, Alberto Bosio, Patrick Girard, Aida Todri-Sanial, et al.. Adaptive Source Bias for Improved Resistive-Open Defect Coverage during SRAM Testing. ATS: Asian Test Symposium, Nov 2013, Jiaosi Township, Taiwan. pp.109-114, 2013, 〈10.1109/ATS.2013.30〉. 〈lirmm-01248609〉
  • Yuanqing Cheng, Aida Todri-Sanial, Alberto Bosio, Luigi Dilillo, Patrick Girard, et al.. A novel method to mitigate TSV electromigration for 3D ICs. ISVLSI: IEEE Computer Society Annual Symposium on VLSI, Aug 2013, Natal, Brazil. pp.121-126, 2013, 〈10.1109/ISVLSI.2013.6654633〉. 〈lirmm-01248617〉
  • Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, Arnaud Virazel. Why and How Controlling Power Consumption During Test: A Survey. ATS: Asian Test Symposium, Nov 2012, Niigata, Japan. Test Symposium (ATS), 2012 IEEE 21st Asian, pp. 221-226, 2012, 〈http://aries3a.cse.kyutech.ac.jp/~ats12/〉. 〈10.1109/ATS.2012.30〉. 〈lirmm-00818984〉
  • Leonardo Zordan, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, et al.. Defect Analysis in Power Mode Control Logic of Low-Power SRAMs. ETS: European Test symposium, May 2012, Annecy, France. 17th IEEE European Test Symposium, 2012, 〈http://ets2012.imag.fr/〉. 〈10.1109/ETS.2012.6233033〉. 〈lirmm-00805374〉
  • Georgios Tsiligiannis, Luigi Dilillo, Alberto Bosio, Patrick Girard, Aida Todri, et al.. A Novel Framework for Evaluating the SRAM Core-Cell Sensitivity to Neutrons. RADECS: European Conference on Radiation and Its Effects on Components and Systems, Sep 2012, Biarritz, France. pp.1-4, 2012, 〈http://www.ims-bordeaux.fr/RADECS2012/pages/pageDynamiqueSITEExt.php?guidPage=home_page〉. 〈lirmm-00805163〉
  • Georgios Tsiligiannis, Luigi Dilillo, Alberto Bosio, Patrick Girard, Aida Todri, et al.. Evaluation of Test Algorithms Stress Effect on SRAMs under Neutron Radiation. IEEE. IOLTS'2012: International On-Line VLSI Test symposium, Jun 2012, Sitges, Spain. pp.212-222, 2012, 〈http://tima.imag.fr/conferences/iolts/iolts12/〉. 〈10.1109/IOLTS.2012.6313853〉. 〈lirmm-00805373〉
  • Leonardo Zordan, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, et al.. Low-power SRAMs Power Mode Control Logic: Failure Analysis and Test Solutions. ITC'2012: International Test Conference, Nov 2012, Anaheim, CA, United States. IEEE, pp.1-10, 2012, 〈http://www.itctestweek.org/〉. 〈10.1109/TEST.2012.6401578〉. 〈lirmm-00805143〉
  • Georgios Tsiligiannis, Luigi Dilillo, Alberto Bosio, Patrick Girard, Aida Todri, et al.. Dynamic Mode Test of a Commercial 4Mb Toggle MRAM under Neutron Radiation. RADECS: European Conference on Radiation and Its Effects on Components and Systems, Sep 2012, Biarritz, France. pp.1-4, 2012, 〈http://www.ims-bordeaux.fr/RADECS2012/pages/pageDynamiqueSITEExt.php?guidPage=home_page〉. 〈lirmm-00805165〉
  • Aida Todri, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel. Electro-Thermal Analysis of 3D Power Delivery Networks. DAC: Design Automation Conference, 2012, San Francisco, United States. 49th Design Automation Conference Work-in-Progress (WIP) Track, 2012. 〈lirmm-00806836〉
  • Ahn Duc Tran, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, et al.. A Pseudo-Dynamic Comparator for Error Detection in Fault Tolerant Architectures. VTS: VLSI Test Symposium, Apr 2012, Hawaii, United States. VLSI Test Symposium (VTS), 2012 IEEE 30th, pp.50-55, 2012, 〈10.1109/VTS.2012.6231079〉. 〈lirmm-00806778〉
  • João Azevedo, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, et al.. Resistive-Open Defects Affecting Bit-Line Selection in TAS-MRAM Architectures. JNRDM: Journées Nationales du Réseau Doctoral en Microélectronique, 2012, Paris, France. 2012. 〈lirmm-00806827〉
  • Carolina Metzler, Aida Todri, Alberto Bosio, Luigi Dilillo, Patrick Girard, et al.. Through-Silicon-Via Resistive-Open Defect Analysis. ETS: European Test Symposium, May 2012, Annecy, France. Test Symposium (ETS), 2012 17th IEEE European, 2012, 〈10.1109/ETS.2012.6233037〉. 〈lirmm-00806848〉
  • Miroslav Valka, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, et al.. Power Supply Noise Sensor Based on Timing Uncertainty Measurements. ATS: Asian Test Symposium, Nov 2012, Niigata, Japan. 21st IEEE Asian Test Symposium, pp.161-166, 2012, 〈10.1109/ATS.2012.46〉. 〈lirmm-00806890〉
  • Zhenzhou Sun, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, et al.. Fault Localization Improvement through an Intra-Cell Diagnosis Approach. 38th International Symposium for Testing and Failure Analysis, Nov 2012, United States. pp.509-519, 2012. 〈lirmm-00806863〉
  • Zhenzhou Sun, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, et al.. Defect Localization Through an Effect-Cause based Intra-Cell Diagnosis. Colloque GDR SoC-SiP, 2012, Paris, France. 2012. 〈lirmm-00806841〉
  • João Azevedo, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, et al.. Impacts of Resistive-Open Defects in the Word-Line Selection of TAS-MRAMs. Colloque GDR SoC-SiP, 2012, Paris, France. 2012. 〈lirmm-00806842〉
  • Carolina Metzler, Aida Todri, Alberto Bosio, Luigi Dilillo, Patrick Girard, et al.. Resistive-Open Defect Analysis for Through-Silicon-Vias. DCIS: Design of Circuits and Integrated Systems, 2012, Avignon, France. XXVII Conference on Design of Circuits and Integrated Systems, 2012. 〈lirmm-00806803〉
  • Miroslav Valka, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, et al.. Adaptive Voltage Scaling via Effective On-Chip Timing Uncertainty Measurements. Colloque GDR SoC-SiP, 2012, Paris, France. 2012. 〈lirmm-00806859〉
  • Georgios Tsiligiannis, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, et al.. Radiation Induced Effects on Electronic Systems and ICs. SETS: South European Test Seminar, Mar 2012, Sauze d'Oulx, Italy. South European Test Seminar, 2012, 〈http://www.cad.polito.it/SETS12/〉. 〈lirmm-00807055〉
  • Georgios Tsiligiannis, Luigi Dilillo, Alberto Bosio, Patrick Girard, Aida Todri, et al.. Dynamic Mode Testing of SRAMS under Neutron Radiation. Sixième colloque du GDR SOC-SIP du CNRS, Jun 2012, Paris, France. 2012, 〈http://www2.lirmm.fr/~w3mic/SOCSIP/index.php/colloque/colloque-2012〉. 〈lirmm-00807053〉
  • Georgios Tsiligiannis, Luigi Dilillo, Alberto Bosio, Patrick Girard, Aida Todri, et al.. SRAM testing under Neutron Radiation for the evaluation of different algorithms stress. 15ème Journées Nationales du Réseau Doctoral en Microélectronique, Jun 2012, Marseille, France. 2012, 〈http://jnrdm2012.im2np.fr/〉. 〈lirmm-00807054〉
  • João Azevedo, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, et al.. Impact of Resistive-Bridge Defects in TAS-MRAM Architectures. ATS: Asian Test Symposium, Nov 2012, Niigata, Japan. 21st IEEE Asian Test Symposium, pp.125-130, 2012, 〈10.1109/ATS.2012.37〉. 〈lirmm-00806809〉
  • João Azevedo, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, et al.. Impact of Resistive-Open Defects on the Heat Current of TAS-MRAM Architectures. DATE: Design, Automation and Test in Europe, Mar 2012, Dresden, Germany. Design, Automation & Test in Europe Conference & Exhibition (DATE), 2012, pp.532-537, 2012, 〈10.1109/DATE.2012.6176526〉. 〈lirmm-00689024〉
  • João Azevedo, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, et al.. Analysis of Resistive-Open Defects in TAS-MRAM Array. ITC'2011: International Test Conference, Sep 2011, Anaheim, CA, United States. pp.N/A, 2011. 〈lirmm-00679524〉
  • Leonardo Zordan, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, et al.. Failure Analysis and Test Solutions for Low-Power SRAMs. ATS: Asian Test Symposium, Nov 2011, New Delhi, India. 20th IEEE Asian Test Symposium, pp.459-460, 2011, 〈http://www.ecs.umass.edu/ece/ats11/〉. 〈10.1109/ATS.2011.97〉. 〈lirmm-00805123〉
  • Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, Arnaud Virazel, et al.. Power-Aware Test Pattern Generation for At-Speed LOS Testing. ATS: Asian Test Symposium, Nov 2011, New Delhi, India. Test Symposium (ATS), 2011 20th Asian, pp.506-510, 2011, 〈http://www.ecs.umass.edu/ece/ats11/files/ats2011_cfp_rev1.pdf〉. 〈lirmm-00651917〉
  • Aida Todri, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, et al.. Simultaneous Power and Thermal Integrity Analysis for 3D Integrated Systems. LPonTR'11: IEEE International Workshop on the Impact of Low Power on Test and Reliability, Trondheim, Norway. 2011. 〈lirmm-00651802〉
  • Aida Todri, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, et al.. A Study of Path Delay Variations in the Presence of Uncorrelated Power and Ground Supply Noise. DDECS: Design and Diagnostics of Electronic Circuits and Systems, Apr 2011, Cottbus, Germany. Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2011 IEEE 14th International Symposium on, pp.189-194, 2011, 〈10.1109/DDECS.2011.5783078〉. 〈lirmm-00592000〉
  • Aida Todri, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, et al.. Power Supply Noise and Ground Bounce Aware Pattern Generation for Delay Testing. NEWCAS: International New Circuits and Systems Conference, Jun 2011, Bordeaux, France. New Circuits and Systems Conference (NEWCAS), 2011 IEEE 9th International, pp.73-76, 2011, 〈10.1109/NEWCAS.2011.5981222〉. 〈lirmm-00647815〉
  • T. Liu, A. Mccarn, C. Melachrinos, C. Meroni, A. Negri, et al.. The Fast Track real time processor and its impact on muon isolation, tau and b-jet online selections at ATLAS. Real Time Conference (RT), 2010 17th IEEE-NPSS, 2010, Unknown, Unknown or Invalid Region. pp.1-8, 2010, 〈10.1109/RTC.2010.5750337〉. 〈lirmm-01248627〉
  • Aida Todri, Malgorzata Marek-Sadowska, François Maire, Christophe Matheron. A study of decoupling capacitor effectiveness in power and ground grid networks. ISQED: International Symposium on Quality Electronic Design, Mar 2009, San Jose, CA, United States. 10th International Symposium on Quality Electronic Design, pp.653-658, 2009, 〈10.1109/ISQED.2009.4810371〉. 〈lirmm-01248628〉

Poster11 documents

  • Nicolas Jeanniot, Aida Todri-Sanial, Pascal Nouet, Gaël Pillonnet, Hervé Fanet. Impact of Power-Clock Network on Adiabatic Logic. GDR SoC-SiP, Jun 2016, Nantes, France. 11ème Colloque national du GDR SoC-SiP, 2016, 〈http://www.gdr-soc.cnrs.fr/colloque-2016/〉. 〈lirmm-01456996〉
  • Liuyang Zhang, Yuanquing Cheng, Wang Kang, Yaojun Zhang, Weisheng Zhao, et al.. Investigation of Reliability and Performance for STT-MRAM under PVT Variations. GDR SoC-SiP, Jun 2016, Nantes, France. 11ème Colloque national du GDR SoC-SiP, 2016, 〈http://www.gdr-soc.cnrs.fr/colloque-2016/〉. 〈lirmm-01457244〉
  • Carolina Metzler, Aida Todri-Sanial, Patrick Girard. Small Delay Defect Investigation in Critical Path Delay with Multiple TSVs. EMicro-NE, Oct 2015, Campina Grande, Brazil. X Escola de Microeletrônica do Nordeste, 2015, 〈https://sites.google.com/site/emicrone2015/〉. 〈lirmm-01456983〉
  • Aida Todri-Sanial. Carbon Nanotubes for Energy Efficient Integrated Circuits. CNRS Colloque Physique Theorique et ses Interfaces, Nov 2014, Paris, France. 2014. 〈lirmm-01456951〉
  • Aida Todri-Sanial. On Carbon Nanotubes as VLSI Interconnects. CMOS Emerging Technology Research Symposium, Jul 2014, Grenoble, France. 2014. 〈lirmm-01456947〉
  • Georgios Tsiligiannis, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, et al.. Investigating Multiple-Cell-Upsets on a 90mn SRAM. Colloque GDR SoC-SiP, France. 2013. 〈lirmm-00839108〉
  • Georgios Tsiligiannis, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, et al.. Evaluating An SEU Monitor For Mixed-Field Radiation Environments. iWoRID: International Workshop on Radiation Imaging Detectors, Jun 2013, Paris, France. 15th International Workshops on Radiation Imaging Detectors, 2013, 〈http://www.synchrotron-soleil.fr/Workshops/2013/IWORID2013〉. 〈lirmm-01238433〉
  • Carolina Metzler, Aida Todri, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, et al.. Resistive Open Defect Analysis for Through-Silicon-Vias. ETS: European Test Symposium, France. pp.183, 2012. 〈lirmm-00806795〉
  • Zhenzhou Sun, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, et al.. Fault-Effect Propagation Based Intra-cell Scan Chain Diagnosis. Colloque GDR SoC-SiP, Jun 2013, Lyon, France. 2013. 〈lirmm-00839113〉
  • João Azevedo, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, et al.. Performance Evaluation of Capacitive defects on TAS-MRAMs. Colloque GDR SoC-SiP, France. 2013. 〈lirmm-00839093〉
  • João Azevedo, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, et al.. Coupling-Based Resistive-Open Defects in TAS-MRAM Architectures. ETS: European Test Symposium, May 2012, Annecy, France. Test Symposium (ETS), 2012 17th IEEE European, 2012, 〈10.1109/ETS.2012.6233034〉. 〈lirmm-00806793〉

Ouvrage (y compris édition critique et traduction)1 document

  • Aida Todri. Signal Integrity for SoC Design and Verification. California State University, Long Beach, 2003. 〈lirmm-01254080〉

Chapitre d'ouvrage5 documents

  • Aida Todri-Sanial. Exploring Carbon Nanotubes for 3D Power Delivery Networks. Aida Todri-Sanial, Jean Dijon, Antonio Maffuci. Carbon Nanotubes for Interconnects, CRC Press, pp.283-314, 2016, 978-3-319-29746-0. 〈10.1007/978-3-319-29746-0_10〉. 〈lirmm-01445018〉
  • Aida Todri-Sanial. Exploration of Carbon Nanotubes For Efficient Power Delivery. Saraju P. Mohanty; Ashok Srivastava. Nano-CMOS and Post-CMOS Electronics: Devices and Modelling, IET, 2016, Chapter 9, 9781849199971 (print) 9781849199988 (online). 〈10.1049/PBCS029E_ch9〉. 〈lirmm-01445053〉
  • Aida Todri-Sanial. Lumped Electro-Thermal Modeling and Analysis of Carbon Nanotube Interconnects. Saraju P. Mohanty; Ashok Srivastava. Nano-CMOS and Post-CMOS Electronics: Circuits and Design , IET, 2016, Chapter 7, 978-1-84919-999-5 〈10.1049/PBCS030E_ch7〉. 〈lirmm-01445070〉
  • Aida Todri-Sanial. Overview of Physical Design Issues for 3D-Integrated Circuits. Aida Todri-Sanial, Chuan Seng Tan. Physical Design for 3D Integrated Circuits, CRC Press, pp.31-37, 2015, Chapter 2. PHYSICAL DESIGN METHODS FOR 3D INTEGRATION, 9781498710367. 〈10.1201/b19225-4〉. 〈lirmm-01444992〉
  • Aida Todri-Sanial. Design Methodology for 3D Power Delivery Networks. A. Todri-Sanial; Ch. S. Tan. Physical Design for 3D ICs, CRC Press, 2015, 9781498710367. 〈lirmm-01445808〉

Direction d'ouvrage, Proceedings, Dossier3 documents

HDR1 document

  • Aida Todri-Sanial. Design Space Exploration Of Emerging Technologies For Energy Efficiency. Digital Libraries [cs.DL]. University of Montpellier, 2014. 〈tel-01255761〉