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Tarik Graba

Télécom Paris
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Documents

Publications

High Throughput/Gate AES Hardware Architectures Based on Datapath Compression

Rei Ueno , Naofumi Homma , Sumio Morioka , Noriyuki Miura , Kohei Matsuda
IEEE Transactions on Computers, 2020, 69 (4), pp.534-548. ⟨10.1109/TC.2019.2957355⟩
Article dans une revue hal-02517649v1

Diffusional Side-channel Leakage from Unrolled Lightweight Block Ciphers: A Case Study of Power Analysis on PRINCE

Ville Yli-Mayry , Rei Ueno , Noriyuki Miura , Makoto Nagata , Shivam Bhasin
IEEE Transactions on Information Forensics and Security, 2020, pp.1-1. ⟨10.1109/TIFS.2020.3033441⟩
Article dans une revue hal-02977542v1
Image document

Cryptographically Secure Shield for Security IPs Protection

Xuan-Thuy Ngo , Jean-Luc Danger , Sylvain Guilley , Tarik Graba , Yves Mathieu
IEEE Transactions on Computers, 2017, 66 (2), ⟨10.1109/TC.2016.2584041⟩
Article dans une revue hal-02287686v1

All-Digital Calibration of Timing Skews for TIADCs Using The Polyphase Decomposition

Han Le Duc , D. M. Nguyen , Chadi Jabbour , Tarik Graba , Patricia Desgreys
IEEE Transactions on Circuits and Systems II: Express Briefs, 2016, 63 (1), pp.99-103
Article dans une revue hal-01271601v1

Multi-Level Formal Analysis, A New Direction for Fault Injection Attack?

Laurent Sauvage , Tarik Graba , Thibault Porteboeuf
Journal of Cryptographic Engineering, 2016
Article dans une revue hal-02287457v1

A Multishutter Time Sensor for Multispectral Imaging in a 3D reconstruction integrated sensor

Anthony Kolar , Andrea Pinna , Olivier Romain , Sylvain Viateur , Thomas Ea
IEEE Sensors Journal, 2009, 9, pp.478-484
Article dans une revue hal-01534262v1

A system for an accurate 3D reconstruction in video endoscopy capsule

Anthony Kolar , Olivier Romain , Jad Ayoub , David Faura , Sylvain Viateur
EURASIP Journal on Embedded Systems, 2009, 2009, pp.716317. ⟨10.1155/2009/716317⟩
Article dans une revue hal-01198848v1

Jitter Compensation Mechanism for Dynamic Deterministic Networks

Guillaume Soudais , Tarik Graba , Yves Mathieu , Sebastien Bigo
Optical Fiber Communication Conference (OFC) 2023, Mar 2023, San Diego California, United States. pp.Th3D.2, ⟨10.1364/OFC.2023.Th3D.2⟩
Communication dans un congrès hal-04426205v1

RISC-V Extension for Lightweight Cryptography, Protection against SCA

Etienne Tehrani , Tarik Graba , Abdelmalek Si Merabet , Jean-Luc Danger
Workshop on Practical Hardware Innovations in Security Implementation and Characterization (PHISIC 2022), May 2022, Gardanne, France
Communication dans un congrès hal-03752972v1

RSM Protection of the PRESENT Lightweight Cipher as a RISC-V Extension

Etienne Tehrani , Tarik Graba , Abdelmalek Si Merabet , Jean-Luc Danger
2021 24th Euromicro Conference on Digital System Design (DSD), Sep 2021, Palermo, Italy. pp.325-332, ⟨10.1109/DSD53832.2021.00056⟩
Communication dans un congrès hal-03376955v1

RISC-V Extension for Lightweight Cryptography

Etienne Tehrani , Tarik Graba , Abdelmalek Si Merabet , Jean-Luc Danger
2020 23rd Euromicro Conference on Digital System Design (DSD), Aug 2020, Kranj, Slovenia. pp.222-228, ⟨10.1109/DSD51259.2020.00045⟩
Communication dans un congrès hal-02977544v1

Classification of Lightweight Block Ciphers for Specific Processor Accelerated Implementations

Etienne Tehrani , Tarik Graba , Abdelmalek Si Merabet , Sylvain Guilley , Jean-Luc Danger
2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Nov 2019, Genoa, Italy. pp.747-750, ⟨10.1109/ICECS46596.2019.8965156⟩
Communication dans un congrès hal-02517585v1

Acceleration of Lightweight Block Ciphers on Microprocessors

Etienne Tehrani , Tarik Graba , Jean-Luc Danger
CryptArchi 2019, Jun 2019, Prague, Poland
Communication dans un congrès hal-02271470v1
Image document

Generic Architecture for Lightweight Block Ciphers: A First Step Towards Agile Implementation of Multiple Ciphers

Etienne Tehrani , Jean-Luc Danger , Tarik Graba
12th IFIP International Conference on Information Security Theory and Practice (WISTP), Dec 2018, Brussels, Belgium. pp.28-43, ⟨10.1007/978-3-030-20074-9_4⟩
Communication dans un congrès hal-02294599v1

Analysis of Mixed PUF-TRNG Circuit Based on SR-Latches in FD-SOI Technology

Jean-Luc Danger , Risa Yashiro , Tarik Graba , Yves Mathieu , Abdelmalek Si-Merabet
2018 21st Euromicro Conference on Digital System Design (DSD), Aug 2018, Prague, Czech Republic. pp.508-515
Communication dans un congrès hal-02271687v1

A 2.5ns-Latency 0.39pJ/b 289µm2/Gb/s Ultra-Light-Weight PRINCE Cryptographic Processor

Noriyuki Miura , Kohei Matsuda , Karol Myszkowski , Makoto Nagata , Shivam Bhasin
Symposium on VLSI Circuits, Jun 2017, Kyoto, Japan. pp.C266-C267
Communication dans un congrès hal-02288491v1

Hardware Implementation of All Digital Calibration for Undersampling TIADCs

Han Le Duc , D. M. Nguyen , Chadi Jabbour , Tarik Graba , Patricia Desgreys
IEEE International Symposium on Circuits and Systems ISCAS2015, May 2015, Lisbon, Portugal
Communication dans un congrès hal-02287188v1

Countering Early Propagation and Routing Imbalance of DPL

Emna Amouri , Shivam Bhasin , Yves Mathieu , Tarik Graba , Jean-Luc Danger
International Conference on IC Design and Technology (ICICDT), Jun 2015, Leuven, Belgium. ⟨10.1109/ICICDT.2015.7165897⟩
Communication dans un congrès hal-02287122v1
Image document

Cryptographically secure shields

Jean-Michel Cioranesco , Jean-Luc Danger , Tarik Graba , Sylvain Guilley , Yves Mathieu
HOST 2014 - IEEE International Symposium on Hardware-Oriented Security and Trust, May 2014, Washington, United States. pp.25 - 31, ⟨10.1109/HST.2014.6855563⟩
Communication dans un congrès hal-01110463v1

A Look into SIMON from a Side-channel Perspective

Shivam Bhasin , Tarik Graba , Jean-Luc Danger , Zakaria Najm
HOST, May 2014, Washington DC, United States. ⟨10.1109/HST.2014.6855568⟩
Communication dans un congrès hal-02412115v1

Side channel analysis on an embedded hardware fingerprint biometric comparator & low cost countermeasures.

Taoufik Chouta , Tarik Graba , Jean-Luc Danger , Julien Bringer , Maël Berthier
HASP, Jun 2014, Minneapolis, United States. ⟨10.1145/2611765.2611771⟩
Communication dans un congrès hal-02412116v1

Physical Security Evaluation at an Early Design-Phase: A Side-Channel Aware Simulation Methodology

Shivam Bhasin , Jean-Luc Danger , Tarik Graba , Yves Mathieu
ES4CPS, Mar 2014, Dresden, Germany. ⟨10.1145/2559627.2559628⟩
Communication dans un congrès hal-02412041v1

Balancing WDDL dual-rail logic in a tree-based FPGA to enhance physical security

Emna Amouri , Shivam Bhasin , Yves Mathieu , Tarik Graba , Jean-Luc Danger
FPL 2014 - 24th International Conference on Field Programmable Logic and Applications, Sep 2014, Munich, Germany. pp.1--4, ⟨10.1109/FPL.2014.6927422⟩
Communication dans un congrès hal-01372613v1

FPGA design of an Open-Loop True Random Number Generator

Florent Lozac'H , Molka Ben Romdhane , Tarik Graba , Jean-Luc Danger
16th euromicro conference on digital system design, Sep 2013, Santander, Spain. pp.615-622, ⟨10.1109/DSD.2013.73⟩
Communication dans un congrès hal-02412025v1

Design Methodology of an ASIC TRNG based on an open-loop delay chain

Molka Ben Romdhane , Jean-Luc Danger , Tarik Graba , Yves Mathieu
NEWCAS, Jun 2013, Paris, France. ⟨10.1109/NEWCAS.2013.6573654⟩
Communication dans un congrès hal-02411986v1

Stochastic model of a Metastability-based True Random Number Generator

Molka Ben Romdhane , Tarik Graba , Jean-Luc Danger
TRUST, Jun 2013, Londres, United Kingdom. ⟨10.1007/978-3-642-38908-5_7⟩
Communication dans un congrès hal-02412461v1

A Small and High-performance Coprocessor for Fingerprint Match-On-Card

Taoufik Chouta , Jean-Luc Danger , Laurent Sauvage , Tarik Graba
DSD, Sep 2012, Cesme/Izmir, Turkey. ⟨10.1109/DSD.2012.14⟩
Communication dans un congrès hal-02286419v1
Image document

Combined SCA and DFA Countermeasures Integrable in a FPGA Design Flow

Shivam Bhasin , Jean-Luc Danger , Florent Flament , Tarik Graba , Sylvain Guilley
ReConFig, Dec 2009, Cancún, Mexico. pp.213 - 218, ⟨10.1109/ReConFig.2009.50⟩
Communication dans un congrès hal-00411843v3
Image document

WDDL is Protected Against Setup Time Violation Attacks

Nidhal Selmane , Shivam Bhasin , Sylvain Guilley , Tarik Graba , Jean-Luc Danger
CHES, Sep 2009, Lausanne, Switzerland. pp.73-83, ⟨10.1109/FDTC.2009.40⟩
Communication dans un congrès hal-00410135v1
Image document

Shall we trust WDDL?

Sylvain Guilley , Sumanta Chaudhuri , Laurent Sauvage , Tarik Graba , Jean-Luc Danger
Future of Trust in Computing, Jun 2008, Berlin, Germany. pp.208-215, ⟨10.1007/978-3-8348-9324-6_22⟩
Communication dans un congrès hal-00409024v1
Image document

Evaluation of Power-Constant Dual-Rail Logic as a Protection of Cryptographic Applications in FPGAs

Sylvain Guilley , Laurent Sauvage , Jean-Luc Danger , Tarik Graba , Yves Mathieu
Secure System Integration and Reliability Improvement, Jul 2008, Yokohama, Japan. pp.16-23, ⟨10.1109/SSIRI.2008.31⟩
Communication dans un congrès hal-00259153v5

Seuillage dynamique temps réel dans un système embarqué

Tarik Graba , David Faura , Sylvain Viateur , Olivier Romain , Bertrand Granado
Gretsi, 2007, Unknown, Unknown Region
Communication dans un congrès hal-01534424v1

Smart Bi-Spectral Image Sensor for 3D Vision

Anthony Kolar , Tarik Graba , Andrea Pinna , Olivier Romain , Eric Belhaire
IEEE Sensor, 2007, Unknown, Unknown Region
Communication dans un congrès hal-01534347v1

A multi shutter time sensor for multispectral imaging in a 3D Reconstruction embedded sensor

Anthony Kolar , Tarik Graba , Andrea Pinna , Olivier Romain , Thomas Ea
DCIS, 2007, Unknown, Unknown Region
Communication dans un congrès hal-01534346v1

An integrated digital architecture for the real-time reconstruction in a VSIP sensor

Anthony Kolar , Tarik Graba , Andrea Pinna , Olivier Romain , Bertrand Granado
IEEE International Conference on Electronics, Circuits and Systems (ICECS 2006), 2006, Nice, France
Communication dans un congrès hal-01534351v1

A digital processing architecture for 3D reconstruction

Anthony Kolar , Tarik Graba , Andrea Pinna , Olivier Romain , Bertrand Granado
IEEE International Workshop on Computer Architecture for Machine Perception and Sensing (CAMPS2006), 2006, montreal, Canada
Communication dans un congrès hal-01534350v1

Cyclope, une Architecture Pour la Vision Temps Réel en Relief

Tarik Graba , Bertrand Granado , Olivier Romain , Thomas Ea , Andrea Pinna
Journées Francophones Adéquation Algorithme Architecture, 2005, Unknown, Unknown Region
Communication dans un congrès hal-01534426v1

Reconstruction 3D temps réel dans un VSIP

Tarik Graba , Bertrand Granado , Olivier Romain , Thomas Ea , Andrea Pinna
Actes du 20 ième colloque GRETSI: Traitement du signal et des images, 2005, Unknown, Unknown Region. pp.819-822
Communication dans un congrès hal-01534425v1

Cyclope: an integrated real-time 3D image sensor

Tarik Graba , Bertrand Granado , Olivier Romain , Thomas Ea , Andrea Pinna
XIX Conference on design of circuits and integrated systems, 2004, Unknown, Unknown Region
Communication dans un congrès hal-01534353v1

Stereo Vision

Anthony Kolar , Olivier Romain , Tarik Graba , Thomas Ea , Bertrand Granado
http://intechweb.org/. Stereo Vision, 9 - The Integrated Active Stereoscopic Vision Theory, Integration and Application, I-tech, pp.131 - 152, 2008
Chapitre d'ouvrage hal-01534448v1