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90 résultats
Hardware synthesis for systems of recurrence equations with multidimensional scheduleInternational Journal of Embedded Systems, 2008, 3 (4), pp.271-284
Article dans une revue
hal-00410754v1
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(Pen)-ultimate tiling?Integration, the VLSI Journal, 1994, 17, pp.33-51
Article dans une revue
inria-00564996v1
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A Generic Multi-Phase On-Chip Traffic Generation environmentApplication-specific Systems, Architectures and Processors, Sep 2006, Steamboat Springs, Colorado, United States. pp.23-27, ⟨10.1109/ASAP.2006.5⟩
Communication dans un congrès
hal-00399618v1
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Faust2FPGA for Ultra-Low Audio Latency: Preliminary work in the Syfala projectIFC 2020 - Second International Faust ConferenceInternationnal Faust Conference, Dec 2020, Paris, France. pp.1-9
Communication dans un congrès
hal-03116958v1
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Multi-mode relay simulations: an energy evaluation on WSNetIEEE Radio and Wireless Symposium (RWS), Jan 2011, Phoenix, United States
Communication dans un congrès
inria-00525908v1
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System on ChipDavid Padua. Encyclopedia of Parallel Computing, Spinger, 2011
Chapitre d'ouvrage
hal-00644480v1
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Study of a Full-Duplex Dual- Band OFDM TransceiverDUPLO Workshop on Full - Duplex Radios and Systems, Jun 2014, Oulu, Finland
Communication dans un congrès
hal-01090007v1
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Towards an FPGA-Based Compilation Flow for Ultra-Low Latency Audio Signal ProcessingSMC-22 - Sound and Music Computing, Jun 2022, Saint-Étienne, France
Communication dans un congrès
hal-03805199v1
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Software Defined Radio Architecture Survey for Cognitive TestbedsIWCMC 2012 : 8th International Wireless Communications and Mobile Computing Conference, Aug 2012, Limassol, Cyprus
Communication dans un congrès
hal-00736995v1
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Full Duplex Prototype of OFDM on GNURadio and USRPsIEEE Radio Wireless Symposium, Jan 2014, Newport Beach, United States
Communication dans un congrès
hal-00920902v1
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Sytare: a Lightweight Kernel for NVRAM-Based Transiently-Powered SystemsIEEE Transactions on Computers, 2019, 68 (9), pp.1390 - 1403. ⟨10.1109/TC.2018.2889080⟩
Article dans une revue
hal-01954979v1
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High-Level Synthesis of Loops Using the Polyhedral ModelP. Coussy and A. Morawiec. High-Level Synthesis : From Algorithm to Digital Circuit, Spinger, pp.215-230, 2008
Chapitre d'ouvrage
hal-00410719v1
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Synthesis of processor arrays for the algebraic path problem: unifying old results and deriving new architecturesParallel Processing Letters, 1991, 1 (1), pp.19-28
Article dans une revue
hal-00857051v1
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Systolic systems2nd IEE Int. Specialist Seminar on Parallel Digital Processors, 1991, Unknown, pp.6-10
Communication dans un congrès
hal-00857057v1
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Virtual Machine for Software Defined Radio: Evaluating the Software VM ApproachInternational Conference on Embedded software and systems (ICESS), Jun 2010, Bradford, United Kingdom. pp.1970-1977, ⟨10.1109/CIT.2010.334⟩
Communication dans un congrès
hal-00515229v1
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Cognitive Radio Programming: Existing Solutions and Open Issues[Research Report] RR-8358, INRIA. 2013, pp.27
Rapport
hal-00859467v1
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(Pen)-ultimate tiling?Proceedings of the IEEE Scalable High Performance Computing Conference, 1994, Knoxville, TN, United States. pp.568-576
Communication dans un congrès
inria-00564995v1
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MPU-based incremental checkpointing for transiently-powered systemsDSD 2020 23rd Euromicro Conference on Digital System Design, Aug 2020, Kranj, France. pp.89-96, ⟨10.1109/DSD51259.2020.00025⟩
Communication dans un congrès
hal-03116944v1
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Accurate Power Consumption Evaluation for Peripherals in Ultra Low-Power embedded systemsGIoTS 2020 - International conference on Global Internet of Things Summit, Jun 2020, Dublin, Ireland. pp.89-96, ⟨10.1109/GIOTS49054.2020.9119593⟩
Communication dans un congrès
hal-03116953v1
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Estimating the Impact of Architectural and Software Design Choices on Dynamic Allocation of Heterogeneous MemoriesRSP 2018 - 29th International Symposium on Rapid System Prototyping, Oct 2018, Turin, Italy. pp.1-7
Communication dans un congrès
hal-01891599v1
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Intermittent Computing with Peripherals, Formally VerifiedLCTES '20 - 21st ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems, Jun 2020, London / Virtual, United Kingdom. pp.85-96, ⟨10.1145/3372799.3394365⟩
Communication dans un congrès
hal-02556878v1
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Loop nest scheduling and transformationsEnvironments and Tools for Parallel Scientific Computing, 1993, Unknown, pp.309-332
Communication dans un congrès
hal-00857079v1
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Master Interface for On-Chip Hardware Accelerator Burst CommunicationsThe Journal of VLSI Signal, 2007, 49 (1), pp.73-85. ⟨10.1007/s11265-006-0045-2⟩
Article dans une revue
hal-00391222v1
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Programming Models and Implementation Platforms for Software Defined Radio ConfigurationFa-Long Luo. Digital Front-End in Wireless Communication and Broadcasting, Cambridge university press, 2011
Chapitre d'ouvrage
hal-00644441v1
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Peripheral state persistence for transiently-powered systemsIoENT 2017 - 1st Workshop on Internet of Energy Neutral Things, Jun 2017, Geneva, Switzerland. ⟨10.1109/GIOTS.2017.8016243⟩
Communication dans un congrès
hal-01609277v1
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Toward an energy reduction in mobile relays: combining MIMO and multi-modeIFIP Wireless Days 2011, Oct 2011, Niagara Falls, Canada
Communication dans un congrès
hal-00645905v1
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Resource-constrained scheduling of partitioned algorithms on processor arraysIntegration, the VLSI Journal, 1996, 20, pp.139-159
Article dans une revue
hal-00856913v1
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Making Frugal Spatial Audio Systems Using Field-Programmable Gate ArraysProceedings of the 2023 New Interfaces for Musical Expression Conference, May 2023, Mexico City, Mexico
Communication dans un congrès
hal-04169228v1
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CorteXlab: An Open FPGA-based Facility for Testing SDR & Cognitive Radio Networks in a Reproducible EnvironmentINFOCOM'2014 Demo/Poster Session, IEEE, Apr 2014, Toronto, Canada
Communication dans un congrès
hal-01018240v1
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UWB Ranging for Rapid MovementsIPIN 2018, Sep 2018, Nantes, France. pp.1-8, ⟨10.1109/IPIN.2018.8533820⟩
Communication dans un congrès
hal-01951454v1
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