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90 résultats
Hardware synthesis for systems of recurrence equations with multidimensional scheduleInternational Journal of Embedded Systems, 2008, 3 (4), pp.271-284
Article dans une revue
hal-00410754v1
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Study of a Full-Duplex Dual- Band OFDM TransceiverDUPLO Workshop on Full - Duplex Radios and Systems, Jun 2014, Oulu, Finland
Communication dans un congrès
hal-01090007v1
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Towards an FPGA-Based Compilation Flow for Ultra-Low Latency Audio Signal ProcessingSMC-22 - Sound and Music Computing, Jun 2022, Saint-Étienne, France
Communication dans un congrès
hal-03805199v1
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(Pen)-ultimate tiling?Integration, the VLSI Journal, 1994, 17, pp.33-51
Article dans une revue
inria-00564996v1
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A Generic Multi-Phase On-Chip Traffic Generation environmentApplication-specific Systems, Architectures and Processors, Sep 2006, Steamboat Springs, Colorado, United States. pp.23-27, ⟨10.1109/ASAP.2006.5⟩
Communication dans un congrès
hal-00399618v1
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Faust2FPGA for Ultra-Low Audio Latency: Preliminary work in the Syfala projectIFC 2020 - Second International Faust ConferenceInternationnal Faust Conference, Dec 2020, Paris, France. pp.1-9
Communication dans un congrès
hal-03116958v1
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Multi-mode relay simulations: an energy evaluation on WSNetIEEE Radio and Wireless Symposium (RWS), Jan 2011, Phoenix, United States
Communication dans un congrès
inria-00525908v1
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System on ChipDavid Padua. Encyclopedia of Parallel Computing, Spinger, 2011
Chapitre d'ouvrage
hal-00644480v1
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Software Defined Radio Architecture Survey for Cognitive TestbedsIWCMC 2012 : 8th International Wireless Communications and Mobile Computing Conference, Aug 2012, Limassol, Cyprus
Communication dans un congrès
hal-00736995v1
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Full Duplex Prototype of OFDM on GNURadio and USRPsIEEE Radio Wireless Symposium, Jan 2014, Newport Beach, United States
Communication dans un congrès
hal-00920902v1
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Sytare: a Lightweight Kernel for NVRAM-Based Transiently-Powered SystemsIEEE Transactions on Computers, 2019, 68 (9), pp.1390 - 1403. ⟨10.1109/TC.2018.2889080⟩
Article dans une revue
hal-01954979v1
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High-Level Synthesis of Loops Using the Polyhedral ModelP. Coussy and A. Morawiec. High-Level Synthesis : From Algorithm to Digital Circuit, Spinger, pp.215-230, 2008
Chapitre d'ouvrage
hal-00410719v1
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Synthesis of processor arrays for the algebraic path problem: unifying old results and deriving new architecturesParallel Processing Letters, 1991, 1 (1), pp.19-28
Article dans une revue
hal-00857051v1
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Systolic systems2nd IEE Int. Specialist Seminar on Parallel Digital Processors, 1991, Unknown, pp.6-10
Communication dans un congrès
hal-00857057v1
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Virtual Machine for Software Defined Radio: Evaluating the Software VM ApproachInternational Conference on Embedded software and systems (ICESS), Jun 2010, Bradford, United Kingdom. pp.1970-1977, ⟨10.1109/CIT.2010.334⟩
Communication dans un congrès
hal-00515229v1
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Cognitive Radio Programming: Existing Solutions and Open Issues[Research Report] RR-8358, INRIA. 2013, pp.27
Rapport
hal-00859467v1
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(Pen)-ultimate tiling?Proceedings of the IEEE Scalable High Performance Computing Conference, 1994, Knoxville, TN, United States. pp.568-576
Communication dans un congrès
inria-00564995v1
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MPU-based incremental checkpointing for transiently-powered systemsDSD 2020 23rd Euromicro Conference on Digital System Design, Aug 2020, Kranj, France. pp.89-96, ⟨10.1109/DSD51259.2020.00025⟩
Communication dans un congrès
hal-03116944v1
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Accurate Power Consumption Evaluation for Peripherals in Ultra Low-Power embedded systemsGIoTS 2020 - International conference on Global Internet of Things Summit, Jun 2020, Dublin, Ireland. pp.89-96, ⟨10.1109/GIOTS49054.2020.9119593⟩
Communication dans un congrès
hal-03116953v1
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Formal methods for solving the algebraic path problemApplication-driven architecture synthesis, 1993, Unknown, pp.47-69
Communication dans un congrès
hal-00857078v1
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Hardware-Software Fast and Accurate Prototyping with Soclib & MMAlphaComputer Systems: Architecture, Modeling, and Simulation (SAMOS), 2004, Greece. pp.453-462
Communication dans un congrès
hal-00399634v1
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Performance Evaluation of Multi-antenna and Multi-mode Relays Using a Network SimulatorEUCAP 2012, Mar 2012, Prague, Czech Republic
Communication dans un congrès
hal-00737362v1
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Coupling Loop Transformations and High-Level SynthesisSymposium en Architecture de machines (Sympa 2008), 2008, Fribourg, Switzerland
Communication dans un congrès
hal-00410724v1
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Automatic phase detection for stochastic on-chip traffic generationInternational Conference on Hardware Software Codesign (isss 06), 2006, Seoul, South Korea. pp.88 - 93
Communication dans un congrès
hal-00410758v1
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Quels objets en NVRAM ? Placement en mémoires de travail hétérogènesCompas 2018 - Conférence d’informatique en Parallélisme, Architecture et Système, Jul 2018, Toulouse, France. pp.1-8
Communication dans un congrès
hal-01891398v1
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Compilation for heterogeneous SoCs : bridging the gap between software and target-specific mechanismsworkshop on High Performance Energy Efficient Embedded Systems - HIPEAC, Jan 2014, Vienne, Austria
Communication dans un congrès
hal-00936924v1
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A Programmable Linux-Based FPGA Platform for Audio DSPSound and Music Computing Conference, Royal College of Music and KTH Royal Institute of Technology, Jun 2023, Stockholm, Sweden. pp.110-116
Communication dans un congrès
hal-04394035v1
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Distributed Mobile Group Detection Algorithms: Application to Cycling RaceNinth IEEE Workshop on Practical Issues in Building Sensor Network Applications 2014, Sep 2014, Edmonton, Canada. ⟨10.1109/LCNW.2014.6927701⟩
Communication dans un congrès
hal-01018239v1
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CorteXlab: A Cognitive Radio Testbed for Reproducible Experimentsin Proc. Wireless @ Virginia Tech Symposium, May 2014, Blacksburg, United States
Communication dans un congrès
hal-01101103v1
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Designing parallel programs and integrated circuitsInternational Mathematica Symposium (IMS'06), 2006, Avignon, France. 13 p
Communication dans un congrès
hal-00142674v1
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