Serge Bernard
29
Documents
Présentation
**RESEARCH**
============
Analog and Mixed-Signal Testing
===============================
- Design-for-Testability (DfT),
- 'Built-In-Self-Test (BIST),
- Analog-to-Digital Converter Testing,
- System-in-Package (SiP) Testing.
- Built-in-Self Repair (BISR)
Integrated Circuit Design for Medical Applications
==================================================
- Neural Stimulator for Functional Electrical Stimulation (FES),
- Physiological Signal Recording (ElectroNeuroGram: ENG).
- Medical devices development in the field of ophtalmology and vision based equipments.
Dependability
=============
- Dependability at system level
- Dependability for Analog and mixed signal circuits
Professional Status
===================
- 2014-... : Head of the micorlectronic department - LIRMM
- 2010-2014 : Deputy Head of the micorlectronic department - LIRMM
- 2006-… : Head & Scientific Co-director of [ISyTest](http://www.lirmm.fr/isytest): Institute for System Testing (joint institute [LIRMM](http://www.lirmm.fr/)/[NXP](http://www.nxp.com/))
- 2001-... : CNRS Researcher in the Microelectronics department of LIRMM.
Education
=========
- 2010 – HDR “Habilitation à Diriger les Recherches”. in Microelectronics, University of Montpellier, France.
- 2001 - Ph.D. in Microelectronics, University of Montpellier, France.
- 1999 - Master in Microelectronics, University of Montpellier, France.
- 1998 - “Agrégation de Génie Electrique” high-level competitive examination for recruiting teachers
- 1997 - M.S. in Electrical Engineering, University of Paris VI(Orsay), France.
-
**ACTIVITIES**
--------------
-
**General chair**
-----------------
- Design of Circuits and Integrated System (DCIS’2012), à Avignon.
**Program chair**
-----------------
- IEEE International Conference on Design & Technology of Integrated Systems in Nanoscale Era, (DTIS’11), Athènes, Grèce, 4-7 avril 2011.
**Organization of Special sessions**
------------------------------------
- “biomedical circuits and systems”, basée sur des papiers invités, à IEEE International Symposium of Electronic Design, Test & Applications, (DELTA’10), Ho Chi Minh City, Vietnam, 13-15 janvier 2010.
**Local Chair**
---------------
- IEEE International Workshop on Silicon Debug and Diagnosis, (SDD’04) Ajaccio, France, 26-27 mai 2004.
**Organization commitee**
-------------------------
- IEEE International Mixed-Signal, Sensor and System Test Workshop (IMS3TW’10), La Grande Motte, France, juin 2010,
- IEEE European Test Symposium (ETS’04), Ajaccio, France, 23-26 mai 2004,
- IEEE International Workshop on Silicon Debug and Diagnosis (SDD’04) Ajaccio, France, 26-27 mai 2004,
- International Conference on Field Programmable Logic and Application (FPL’02), Montpellier (La Grande-Motte), France 2-4 septembre 2002,
- IFIP International Conference on Very Large Scale Integration The Global System on Chip Design & CAD Conference (VLSI-SOC’01), Montpellier, France, 3-5 décembre 2001,
- IEEE International Mixed-Signal Test Workshop (IMSTW’00), Montpellier (La Grande- Motte), France, 15-17 juin 2000.
-
**RESEARCH**
============
Analog and Mixed-Signal Testing
===============================
- Design-for-Testability (DfT),
- 'Built-In-Self-Test (BIST),
- Analog-to-Digital Converter Testing,
- System-in-Package (SiP) Testing.
- Built-in-Self Repair (BISR)
Integrated Circuit Design for Medical Applications
==================================================
- Neural Stimulator for Functional Electrical Stimulation (FES),
- Physiological Signal Recording (ElectroNeuroGram: ENG).
- Medical devices development in the field of ophtalmology and vision based equipments.
Dependability
=============
- Dependability at system level
- Dependability for Analog and mixed signal circuits
Professional Status
===================
- 2014-... : Head of the micorlectronic department - LIRMM
- 2010-2014 : Deputy Head of the micorlectronic department - LIRMM
- 2006-… : Head & Scientific Co-director of [ISyTest](http://www.lirmm.fr/isytest): Institute for System Testing (joint institute [LIRMM](http://www.lirmm.fr/)/[NXP](http://www.nxp.com/))
- 2001-... : CNRS Researcher in the Microelectronics department of LIRMM.
Education
=========
- 2010 – HDR “Habilitation à Diriger les Recherches”. in Microelectronics, University of Montpellier, France.
- 2001 - Ph.D. in Microelectronics, University of Montpellier, France.
- 1999 - Master in Microelectronics, University of Montpellier, France.
- 1998 - “Agrégation de Génie Electrique” high-level competitive examination for recruiting teachers
- 1997 - M.S. in Electrical Engineering, University of Paris VI(Orsay), France.
-
**ACTIVITIES**
--------------
-
**General chair**
-----------------
- Design of Circuits and Integrated System (DCIS’2012), à Avignon.
**Program chair**
-----------------
- IEEE International Conference on Design & Technology of Integrated Systems in Nanoscale Era, (DTIS’11), Athènes, Grèce, 4-7 avril 2011.
**Organization of Special sessions**
------------------------------------
- “biomedical circuits and systems”, basée sur des papiers invités, à IEEE International Symposium of Electronic Design, Test & Applications, (DELTA’10), Ho Chi Minh City, Vietnam, 13-15 janvier 2010.
**Local Chair**
---------------
- IEEE International Workshop on Silicon Debug and Diagnosis, (SDD’04) Ajaccio, France, 26-27 mai 2004.
**Organization commitee**
-------------------------
- IEEE International Mixed-Signal, Sensor and System Test Workshop (IMS3TW’10), La Grande Motte, France, juin 2010,
- IEEE European Test Symposium (ETS’04), Ajaccio, France, 23-26 mai 2004,
- IEEE International Workshop on Silicon Debug and Diagnosis (SDD’04) Ajaccio, France, 26-27 mai 2004,
- International Conference on Field Programmable Logic and Application (FPL’02), Montpellier (La Grande-Motte), France 2-4 septembre 2002,
- IFIP International Conference on Very Large Scale Integration The Global System on Chip Design & CAD Conference (VLSI-SOC’01), Montpellier, France, 3-5 décembre 2001,
- IEEE International Mixed-Signal Test Workshop (IMSTW’00), Montpellier (La Grande- Motte), France, 15-17 juin 2000.
-
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Development and Application of Embedded Test Instruments to Digital, Analog/RFs and Secure ICsIOLTS 2020 - 26th IEEE International Symposium on On-Line Testing and Robust System Design, Jul 2020, Napoli, Italy. pp.1-4, ⟨10.1109/IOLTS50870.2020.9159723⟩
Communication dans un congrès
lirmm-02993384v1
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Power Supply Investigation for Wireless Wafer TestLATW'08: 9th Latin-American Test Workshop, Mar 2008, Puebla, Mexico. pp.165-170
Communication dans un congrès
lirmm-00260205v1
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European Network for Test EducationDELTA'02: 1st International Workshop on Electronic DesignTest and Applications, Christchurch, New Zeland, pp.230-239
Communication dans un congrès
lirmm-00268490v1
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Testing System-in-Package WirelesslyLATW'06: 7th Latin American Test Workshop, 2006, Buenos Aires, Argentina. pp.73-78
Communication dans un congrès
lirmm-00102751v1
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Testing System-In-Package WirelesslyDTIS: Design and Technology of Integrated Systems in Nanoscale Era, Sep 2006, Tunis, Tunisia. pp.222-226
Communication dans un congrès
lirmm-00094916v1
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Test Digital, Test de Mémoires, Test Mixte : 5 Centres de Compétence pour la Formation en EuropeCNFM'04 : 8ème Journées Pédagogiques du Comité National de Formation en Microélectronique, 2004, Saint Malo, France. p. 242
Communication dans un congrès
lirmm-00108671v1
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EuNICE-Test Project: A remote Access to Engineering Test for European UniversitiesEWME: European Workshop on Microelectronics Education, 2002, Vigo, Spain. pp.133-136
Communication dans un congrès
lirmm-00268489v1
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A Remote Access to Engineering Test Facilities for the Distant Education of European Microelectronics Students32nd Annual Frontiers in Education (FIE), Nov 2002, Boston, MA, United States. pp.T2E-24, ⟨10.1109/FIE.2002.1157943⟩
Communication dans un congrès
lirmm-00269423v1
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TOETS: Work Package 1Poster de conférence lirmm-00653039v1 |
Wireless Wafer Test for Iterative Testing During System Assembly3D-Test: Testing Three-Dimensional Stacked Integrated Circuits, Nov 2010, Austin, Texas, United States. , 1st IEEE International Workshop on Testing Three-Dimensional Stacked Integrated Circuits, 2010
Poster de conférence
lirmm-00537849v1
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Wireless Test Structure for Integrated SystemsITC'2008: International Test Conference, Oct 2008, Santa Clara, CA, United States. pp.N/A, 2008, ⟨10.1109/TEST.2008.4700704⟩
Poster de conférence
lirmm-00375077v1
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Test de Circuits et de Systèmes IntégrésCollection EGEM, Ed.Hermès, 2004, 2-7462-0864-4
Ouvrages
lirmm-00109158v1
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System and Method for Wirelessly Testing Integrated CircuitsSpain, Patent n° : EP 08290891 WO 2010031879 (A1). 2008, pp.N/A
Brevet
lirmm-00767777v1
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