Nombre de documents

53

Publications - Sébastien Bilavarn


Article dans une revue15 documents

  • Robin Bonamy, Sébastien Bilavarn, Daniel Chillet, Olivier Sentieys. Power Modeling and Exploration of Dynamic and Partially Reconfigurable Systems. Journal of Low Power Electronics, American Scientific Publishers, 2016. <hal-01345664>
  • Sébastien Bilavarn, Jabran Khan, Cécile Belleudy, Muhammad K. Bhatti. Effectiveness of Power Strategies for Video Applications: A Practical Study. Journal of Real-Time Image Processing, Springer Verlag, 2016, 12 (1), pp.123-132. <10.1007/s11554-013-0394-6>. <hal-00961508v3>
  • François Duhem, Fabrice Muller, Robin Bonamy, Sebastien Bilavarn. FoRTReSS: a flow for design space exploration of partially reconfigurable systems. Design Automation for Embedded Systems, Springer Verlag, 2015, 19 (3), pp.301-326. <10.1007/s10617-015-9160-2>. <hal-01134008v1>
  • Robin Bonamy, Sebastien Bilavarn, Daniel Chillet, Olivier Sentieys. Power Consumption Models for the Use of Dynamic and Partial Reconfiguration. Microprocessors and Microsystems: Embedded Hardware Design (MICPRO), Elsevier, 2014, <10.1016/j.micpro.2014.01.002>. <hal-00941532>
  • Taheni Dammak, Werda Imen, Sebastien Bilavarn, Nouri Masmoudi. Fast Prototyping H.264 Deblocking Filter Using ESL Tools. Shaker-Verlag Transactions on Systems, Signals and Devices, 2013, 8 (3), pp.345-362. <hal-01075894>
  • R. Cheour, S. Bilavarn, M. Abid. Exploitation of EDF scheduling in Wireless Sensor Networks. International Journal on Measurement Technologies and Instrumentation Engineering (IJMTIE), 2011, 1 (2), pp.14-27. <hal-00661592>
  • Dominique Blouin, Daniel Chillet, Eric Senn, Sebastien Bilavarn, Robin Bonamy, et al.. AADL Extension to Model Classical FPGA and FPGA Embedded within a SoC. International Journal of Reconfigurable Computing, Hindawi Publishing Corporation, 2011, Article ID 425401, 15 p. <10.1155/2011/425401>. <hal-00650628>
  • S. Bilavarn, T. Dupont, C. Belleudy, M. Auguin, A.-M. Fouillart. Implantation d'un décodeur H.264 sur plateforme multiprocesseur avec gestion énergétique. Revue des Sciences et Technologies de l'Information - Série TSI : Technique et Science Informatiques, Lavoisier, 2010, 29/2, pp.201-224. <hal-00519287>
  • F. Boutekkouk, M. Benmohammed, S. Bilavarn, M. Auguin. UML for Modelling and Performance Estimation of Embedded Systems. The Journal of Object Technology, Chair of Software Engineering, 2009, 8 (2), pp.95-118. <hal-00366587>
  • F. Boutekkouk, S. Bilavarn, M. Auguin, M. Benmohammed. Rewriting logic semantics for SystemC scheduler. International Review on Computers and Software (IRECOS), Praise Worthy Prize, 2009. <hal-00366590>
  • F. Boutekkouk, M. Benmohammed, S. Bilavarn, M. Auguin. UML2.0 Profiles for Embedded Systems and Systems On a Chip (SOCs). The Journal of Object Technology, Chair of Software Engineering, 2009, 8 (1), pp.135-157. <hal-00366581>
  • Jean-Philippe Diguet, Guy Gogniat, Jean Luc Philippe, Yannick Le Moullec, Sébastien Bilavarn, et al.. EPICURE: A partitioning and co-design framework for reconfigurable computing. Microprocessors and Microsystems: Embedded Hardware Design (MICPRO), Elsevier, 2006, 30, pp.367-387. <10.1016/j.micpro.2006.02.015>. <hal-00089393>
  • Sébastien Bilavarn, Guy Gogniat, Jean Luc Philippe, Lilian Bossuet. Design space pruning through early estimations of area / delay trade-offs for FPGA implementations. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE, 2006, 25, N° 10, p. 1950-1968. <hal-00089398>
  • S. Bilavarn, Eric Debes, P. Vandergheynst, Jean-Philippe Diguet. Processor Enhancements for Media Streaming Applications. Journal of VLSI Signal Processing Systems, 2005, 41 (2), pp.225-234. <hal-00806522>
  • Sebastien Bilavarn, Jean-Philippe Diguet, Eric Debes, Pierre Vandergheynst. An optimization Study for Media Delivery: Processor Issues. Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology, Springer, 2005, 41, no.2, Sep. <10.1007/s11265-005-6652-5>. <hal-00084396>

Communication dans un congrès32 documents

  • Joël Wanza, Sebastien Bilavarn, Said Derradji, Cécile Belleudy, Sylvie Lesmanne. Efficiency Modeling and Analysis of 64-bit ARM Clusters for HPC. Euromicro Conference on Digital System Design (DSD), Aug 2016, Limassol, Cyprus. 2016. <hal-01343904>
  • Taheni Dammak, Sébastien Bilavarn, Nouri Masmoudi. HLS based design of a mixed architecture for H.264/AVC CAVLD. 12th International Multi-Conference on Systems, Signals and Devices Program, SSD 2015, Mar 2015, Mahdia, Tunisia. 2015. <hal-01192789>
  • Robin Bonamy, Sébastien Bilavarn, Fabrice Muller. An Energy-Aware Scheduler for Dynamically Reconfigurable Multi-Core Systems. 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, ReCoSoC 2015, Jun 2015, Bremen, Germany. <hal-01192796>
  • J.J. Khan, S. Bilavarn, K. Bhatti, C. Belleudy. Energy Analysis of a Real-Time Multiprocessor Control of Idle States on ARM platforms. 3rd International Conference on Pervasive and Embedded Computing and Communication Systems (PECCS 2013), Feb 2013, Barcelone, Spain. Session Mobile and Pervasive Computing. Paper 39, 2013. <hal-00864637>
  • J.J. Khan, S. Bilavarn, C. Belleudy. Impact of Operating Points on DVFS Power Management. 7th International conference on Design & Technology of Integrated Systems in nanoscale era (DTIS'12), May 2012, Gammarth, Tunisia. pp.1-6, 2012. <hal-00764407>
  • J.J. Khan, S. Bilavarn, C. Belleudy. Energy Analysis of a DVFS Power Strategy on ARM platforms. IEEE Faible Tension Faible Consommation (FTFC 2012), Jun 2012, Paris, France. pp.1-4, 2012. <hal-00764408>
  • Robin Bonamy, Daniel Chillet, Sebastien Bilavarn, Olivier Sentieys. Power Consumption Model for Partial Dynamic Reconfiguration. International Conference on ReConFigurable Computing and FPGA (RECONFIG'2012), Dec 2012, Cancun, Mexico. 2012. <hal-00741611>
  • Daniel Chillet, Eric Senn, Olivier Zendra, Cécile Belleudy, Sebastien Bilavarn, et al.. Open-People: Open Power and Energy Optimization PLatform and Estimator. 15th Euromicro Conference on Digital System Design, Sep 2012, Cesme, Izmir, Turkey. 2012. <hal-00741610>
  • B. Ouni, C. Belleudy, S. Bilavarn, Eric Senn. Embedded Operating Systems Energy Overhead. International Conference on Design & Architectures for Signal & Image Processing (DASIP), Nov 2011, Tampere, Finland. pp.Session "Low Power Design & Methodologies", 2011. <hal-00662441>
  • S. Bilavarn, A. Castagnetti, L. Rodriguez. A Video Monitoring Application for Wireless Sensor Networks using IEEE 802.15.4. 2nd Work shop on Ultra-Low Power Sensor Networks, (WUPS 2011), Feb 2011, Como, Italy. 2011. <hal-00662024>
  • T. Damak, N. Masmoudi, S. Bilavarn. Fast Prototyping H.264 Deblocking filter using ESL tools. 8th International Multi-Conference on Systems, Signals & Devices (SSD'11), Conference on Communication & Signal Processing, Mar 2011, Sousse, Tunisia. 2011. <hal-00662032>
  • Sebastien Bilavarn. Exploitation of power management techniques. Workshop on Ultra-Low Power Sensor Networks (WUPS), co-located with Int. Conf. on Architecture of Computing Systems (ARCS), Feb 2011, Como, Italy. 2011. <hal-01353312>
  • Robin Bonamy, Daniel Chillet, Sebastien Bilavarn, Olivier Sentieys. Parallelism Level Impact on Energy Consumption in Reconfigurable Devices. HEART (International Workshop on Highly-Efficient Accelerators and Reconfigurable Technologies), Jun 2011, London, United Kingdom. 2011. <hal-00650631>
  • Robin Bonamy, Daniel Chillet, Sebastien Bilavarn, Olivier Sentieys. Towards a Power and energy Efficient Use of Partial Dynamic Reconfiguration. Colloque GDR SoC/SiP (System On Chip - System In Package), Jun 2011, Lyon, France. 2011. <hal-00650640>
  • Dominique Blouin, Eric Senn, Robin Bonamy, Daniel Chillet, Sebastien Bilavarn, et al.. FPGA modeling for SoC design exploration. HEART (International Workshop on Highly-Efficient Accelerators and Reconfigurable Technologies, Jun 2011, London, United Kingdom. 2011. <hal-00650630>
  • Robin Bonamy, Daniel Chillet, Olivier Sentieys, Sebastien Bilavarn. Towards a power and energy efficient use of partial dynamic reconfiguration. Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC) Workshop, Jun 2011, Montpellier, France. 2011, <10.1109/ReCoSoC.2011.5981540>. <hal-00650638>
  • R. Cheour, S. Bilavarn, M. Abid. EDF scheduler technique for wireless sensor networks: case study. 4th International Conference on Sensing Technology (ICST 2010), Jun 2010, Lecce, Italy. Session Wireless Sensors Network II, Paper 093, 2010. <hal-00519335>
  • A. Castagnetti, C. Belleudy, S. Bilavarn, M. Auguin. Power consumption modeling for DVFS exploitation. 13th Euromicro Conference on Digital System Design, DSD 2010, Sep 2010, Lille, France. 2010. <hal-00524937>
  • S. Bilavarn, T. Dupont, N. Mounir, C. Belleudy, M. Auguin, et al.. Une Analyse de Performances et de Consommation du Décodage H.264 sur ARM MPCore. SympA'2008, Feb 2008, Fribourg, Switzerland. 08.pdf, 2008. <hal-00367641>
  • S. Bilavarn, C. Belleudy, M. Auguin, T. Dupont, A.-M. Fouillart. Embedded Multicore Implementation of H.264 Decoder with Power Management Considerations. DSD 2008, Sep 2008, Parma, Italy. 2008. <hal-00367653>
  • F. Boutekkouk, S. Bilavarn, M. Auguin, M. Benmohammed. UML profile for Estimating Application Worst Case Execution Time on System-On-Chip. SOC 2008, Nov 2008, Tampere, Netherlands. 2008. <hal-00367660>
  • Yannick Le Moullec, Soren Skovgaard Christensen, Wen Chenpeng, Peter Koch, Sébastien Bilavarn. Design Space Exploration for Rapid Development of DSP Applications. 5th International Conference on Information, Communications and Signal Processing, 2005, Bangkok, Thailand. 2005. <hal-01017534>
  • Yannick Le Moullec, Soren Skovgaard Christensen, Wen Chenpeng, Peter Koch, Sebastien Bilavarn. Fast system-level design of wireless applications. 8th Wireless Personal Multimedia Communications, 2005, Aalborg, Denmark. 2005. <hal-01017538>
  • Sebastien Bilavarn, Jean-Philippe Diguet, Eric Debes, Pierre Vandergheynst. Reconfigurable Coprocessor for Media Streaming. Jun 2004, x, 2004. <hal-00106310>
  • Sébastien Bilavarn, Guy Gogniat, Jean Luc Philippe, Lilian Bossuet. Fast Prototyping of Reconfigurable Architectures From a C Program. 2003, IEEE, pp.XX, 2003. <hal-00089429>
  • Sébastien Bilavarn, Guy Gogniat, Jean Luc Philippe, Lilian Bossuet. Fast Prototyping of Reconfigurable Architectures: An Estimation And Exploration Methodology from System-Level Specifications. 2003, ACM, pp.XX, 2003. <hal-00089446>
  • Sébastien Bilavarn, Guy Gogniat, Jean-Luc Philippe. Estimation de performances à un niveau comportemental pour l'implantation sur composants FPGAs. 7ème Symposium en Architectures Nouvelles de Machines, 2001, Paris, France. 2001. <hal-01017499>
  • Sébastien Bilavarn, Guy Gogniat, Jean-Luc Philippe. Area time power estimation for FPGA based designs at a behavioral level. IEEE International Conference on Electronics, Circuits and Systems, 2000, Beirut, Lebanon. 2000. <hal-01017471>
  • Sébastien Bilavarn, Guy Gogniat, Jean-Luc Philippe. FPGA area time power estimation for DSP applications. International Conference on Signal Processing Applications and Technologies, 2000, Dallas, United States. 2000. <hal-01017479>
  • Sébastien Bilavarn, Guy Gogniat, Jean-Luc Philippe. Méthode de conception d'architectures hétérogènes pour les applications de traitement numérique du signal. 3ème Journées Nationales du Réseau Doctoral de Microélectronique, 2000, Montpellier, France. 2000. <hal-01017483>
  • Sébastien Bilavarn, Guy Gogniat, Jean-Luc Philippe. A hardware software co design methodology for heterogeneous architecture estimation. International Conference on Signal Processing Applications and Technologies, 1999, Orlando, United States. 1999. <hal-01017450>
  • Sébastien Bilavarn, Guy Gogniat, Jean-Luc Philippe. Estimation d'architectures hétérogènes pour les applications de traitement numérique du signal. 2ème Colloque du GDR CAO de Circuits Int égrés et Syst èmes, 1999, Aix-en-Provence, France. 1999. <hal-01017443>

Poster1 document

  • Sébastien Bilavarn. Linux Embarqué - Développement de pilotes périphériques. 13èmes journées pédagogiques du CNFM, Nov 2014, Saint-Malo, France. 2014. <hal-01104573>

Chapitre d'ouvrage1 document

  • C. Belleudy, S. Bilavarn. Power models and strategies for multiprocessor platforms. Design Technology for Heterogeneous Embedded Systems, Edité par I. O'CONNOR, G. NICOLESCU, C. PIGUET, Springer, pp.411-436, 2011. <hal-00663164>

Brevet1 document

  • Sébastien Bilavarn, Muhammad Khurram Bhatti, Cécile Belleudy. Method for scheduling with deadline constraints, in particular in linux, carried out in user space. France, Patent n° : International Application No PCT/IB2013/059916. 2014. <hal-01104569>

Pré-publication, Document de travail3 documents

  • Joel Wanza, Sébastien Bilavarn, Said Derradji, Cécile Belleudy, Sylvie Lesmanne. Efficiency Modeling and Analysis of 64-bit ARM Clusters for HPC. 2016. <hal-01309531>
  • Robin Bonamy, Sébastien Bilavarn, Daniel Chillet, Olivier Sentieys. Power Modeling and Exploration of Dynamically Reconfigurable Multicore Designs. 2013. <hal-01287838>
  • Sébastien Bilavarn, Taheni Damak, Robin Bonamy. Hardware Acceleration of Real-Life Applications: from Theory to Implementation. 2012. <hal-01287829>