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Improving Storage of Patterns in Binary Cluster-Based Neural Networks: Clone-based Model and Architecture

Hugues Nono Wouafo , Cyrille Chavet , Philippe Coussy
Internationnal workshop on Neural Coding, co-located with DATE Conference 2015, Mar 2015, Grenoble, France
Communication dans un congrès hal-01101583v1
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Algorithm and Implementation of an Associative Memory for Oriented Edge Detection Using Improved Clustered Neural Networks

Robin Danilo , Hooman Jarollahi , Vincent Gripon , P Coussy , Laura Conde-Canencia , et al.
2015 International Symposium on Circuits and Systems (ISCAS 2015), May 2015, Lisbonne, Portugal. pp.2501 - 2504, ⟨10.1109/ISCAS.2015.7169193⟩
Communication dans un congrès hal-02116052v1
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Context-memory Aware Mapping for Energy Efficient Acceleration with CGRAs

Satyajit Das , Kevin Martin , Philippe Coussy
Design, Automation and Test in Europe Conference (DATE), Mar 2019, Florence, Italy
Communication dans un congrès hal-02086145v1

Hierarchical and Multiple-Clock Domain High-Level Synthesis for Low-Power Design on FPGA

Ghizlane Lebreton , Philippe Coussy , Dominique Heller , Eric Martin
International Conference on Field Programmable Logic and Applications, Aug 2009, Italy. pp.464-468
Communication dans un congrès hal-00663229v1
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Synthèse d'Interface de Communication pour les Composants Virtuels

Philippe Coussy
Micro et nanotechnologies/Microélectronique. Université de Bretagne Sud, 2003. Français. ⟨NNT : ⟩
Thèse tel-00077867v1

Virtual Component IP Re-use in Telecommunication Systems Design: A Case Study of MPEG-2 / JPEG2000 Encoder

Philippe Coussy , Adel Baganne , E. Martin
2002, pp.733-736
Communication dans un congrès hal-00077869v1

Intégration Optimisée de Composants Virtuels orientés TDSI par la Synthèse d'Architecture

Philippe Coussy , Adel Baganne , E. Martin , E. Casseau
2003, pp.353-358
Communication dans un congrès hal-00077863v1

Réseaux de clusters de neurones restreints

Robin Danilo , Vincent Gripon , Philippe Coussy , Laura Conde Canencia
GRETSI 2015 : 25ème colloque du Groupement de Recherche en Traitement du Signal et des Images, Sep 2015, Lyon, France. pp.1 - 5
Poster de conférence hal-01325893v1

A Methodology based on Transportation Problem Modeling for Designing Parallel Interleaver Architectures

Sani Awais Hussein , Philippe Coussy , Cyrille Chavet , Eric Martin
36th IEEE International Conference on Acoustics, Speech and Signal Processing, May 2011, Prague, Czech Republic. pp.XX-YY
Communication dans un congrès hal-00592669v1
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A memory Mapping Approach for Parallel Interleaver design with multiples read and write accesses

Cyrille Chavet , Philippe Coussy
IEEE International Symposium on Circuits and Systems (ISCAS), May 2010, Paris, France. page 3168-3171, ⟨10.1109/ISCAS.2010.5537955⟩
Communication dans un congrès hal-00482682v1
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Energy Efficient Hardware Loop Based Optimization for CGRAs

Chilankamol Sunny , Satyajit Das , Kevin J M Martin , Philippe Coussy
Journal of Signal Processing Systems, In press, ⟨10.1007/s11265-022-01760-9⟩
Article dans une revue hal-03704229v1
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Synthèse Comportementale Sous Contraintes de Communication et de Placement Mémoire pour les composants du TDSI

Gwenolé Corre , Philippe Coussy , Pierre Bomel , Eric Senn , Eric Martin
GRETSI'05 (Colloque sur le Traitement du Signal et de l'Image), 2005, LOUVAIN LA NEUVE, Belgique. pp.779-782
Communication dans un congrès hal-00077384v1

Méthodologie de modélisation et d'implémentation d'adaptateurs spatio-temporels

Cyrille Chavet , Philippe Coussy , Eric Martin , Pascal Urard
Colloque national du GRETSI, Groupe de Recherche et d'Etudes du Traitement du Signal, Sep 2007, Troyes, France
Communication dans un congrès hal-00490210v1

A Dynamically Reconfigurable ECC Decoder Architecture for the next generation communication standards (5G, SDR and behond)

Cyrille Chavet , Philippe Coussy
WInnComm Europe, Oct 2016, Paris, France
Communication dans un congrès hal-01344550v1
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Clone-Based Encoded Neural Networks to Design Efficient Associative Memories

Hugues Wouafo , Cyrille Chavet , Philippe Coussy
IEEE Transactions on Neural Networks and Learning Systems, 2019, 30 (10), pp.1-14. ⟨10.1109/TNNLS.2018.2890658⟩
Article dans une revue hal-02060021v1

Algorithm and Implementation of an Associative Memory for Oriented Edge Detection Using Improved Clustered Neural Networks

Robin Danilo , Philippe Coussy , Laura Conde Canencia
Colloque national du GdR BioCOmp, Oct 2015, Saint Paul de Vence, France
Poster de conférence hal-02511244v1

Algorithm and Implementation of an Associative Memory for Oriented Edge Detection Using Improved Clustered Neural Networks

Robin Danilo , Hooman Jarollahi , Philippe Coussy , Vincent Gripon , Laura Conde Canencia
International Workshop on Neuromorphic and Brain-Based Computing Systems (Neucomp), Mar 2015, Grenoble, France
Poster de conférence hal-02511239v1

Improving storage of patterns in recurrent neural networks: Clone-based model and architecture

Hugues Wouafo , Cyrille Chavet , Philippe Coussy
2015 IEEE International Symposium on Circuits and Systems (ISCAS), May 2015, Lisbon, France. pp.577-580, ⟨10.1109/ISCAS.2015.7168699⟩
Communication dans un congrès hal-02511108v1

A Design Methodology for Integrating IP into SOC Systems

Philippe Coussy , Adel Baganne , E. Martin
2002, pp.307-310
Communication dans un congrès hal-00077876v1

VLSI Architectures and NoCs for Neural Coding

Jean-Philippe Diguet , Philippe Coussy , Cyrille Chavet
1st International Symposium on Brainware LSI, Mar 2014, Japan
Communication dans un congrès hal-01009489v1

From Software Code to Hardware: Directions in High-Level Synthesis

Philippe Coussy
International Workshop on "Electronic System-Level Design towards Heterogeneous Computing", IEEE Design Automation and Test in Europe DATE, March 2014, Mar 2014, Germany
Communication dans un congrès hal-01009493v1

Constrained algorithmic IP design for system-on-chip

Philippe Coussy , E. Casseau , Pierre Bomel , Adel Baganne , E. Martin
Integration, the VLSI Journal, 2007, 40 (2), pp.XX-XX
Article dans une revue hal-00153087v1

Designing Parallel Interleaver architecture through Tripartite Edge Coloring Approach

Sani Awais Hussein , Cyrille Chavet , Philippe Coussy , Eric Martin
GDR SoC-SiP, Jun 2011, lyon, France
Communication dans un congrès hal-00682201v1
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An Approach Based on Edge Coloring of Tripartite Graph for Designing Parallel LDPC Interleaver Architecture

Sani Awais Hussein , Philippe Coussy , Cyrille Chavet , Eric Martin
IEEE International Symposium on Circuits and Systems (ISCAS) 2011, May 2011, Rio de Janeiro, Brazil. pp.XX-YY
Communication dans un congrès hal-00592617v1

Communication and Timing Constraints Analysis for IP Design and Integration

Philippe Coussy , Adel Baganne , E. Martin
2003, pp.38-43
Communication dans un congrès hal-00077861v1

∂ GAUT: A High-Level Synthesis Tool for DSP applications

Philippe Coussy , Cyrille Chavet , Pierre Bomel , Dominique Heller , Eric Senn , et al.
Philippe Coussy & Adam Morawiec. High-Level Synthesis: From Algorithm to Digital Circuits, Springer, pp.147-170, 2008
Chapitre d'ouvrage hal-00369029v1

Design Approach to Automatically Synthesize ANSI-C Assertions during High-Level Synthesis of Hardware Accelerators

Mohamed Ben Hammouda , Philippe Coussy , Loïc Lagadec
ICSAS 2014 - International symposium on circuits and systems, Jun 2014, Melbourne, Australia
Communication dans un congrès hal-01009572v1

An Introduction to High-Level Synthesis

Philippe Coussy , Daniel D. Gajski , Andres Takach , Michael Meredith
IEEE Design & Test, 2009, 26 (4), pp.8-17
Article dans une revue hal-00447325v1
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Transient Key-based Obfuscation for HLS in an Untrusted Cloud Environment

Hannah Badier , Jean-Christophe Le Lann , Philippe Coussy , Guy Gogniat
2019 Design, Automation & Test in Europe Conference & Exhibition, DATE 2019, Mar 2019, Florence, Italy
Communication dans un congrès hal-02052433v1

Amélioration des performances des mémoires associatives par les réseaux à clones

Hugues Nono , Cyrille Chavet , Philippe Coussy
Colloque national du GdR SoC-SiP, Jun 2016, Nantes, France
Communication dans un congrès hal-01318028v1