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Patrick Girard

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Test Application Time Reduction with a Dynamically Reconfigurable Scan Tree Architecture

Yannick Bonhomme , Tomokazu Yoneda , Hideo Fujiwara , Patrick Girard
8th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS), Apr 2005, Sopron, Hungary. pp.19-26
Communication dans un congrès lirmm-00105987v1