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Multi-architecture Value Analysis for Machine Code

 Hugues Cassé , Florian Birée , Pascal Sainrat
13th International Workshop on Worst-Case Execution Time Analysis - WCET 2013, Jul 2013, Paris, France. pp. 42-52
Communication dans un congrès hal-01148808v1
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Optimisations du chargement des instructions

 Thierry Haquin , Philippe Reynes , Christine Rochange , Pascal Sainrat
8ème Symposium en Architectures Nouvelles de Machines, Apr 2002, Hammamet, Tunisie. pp.257-264
Communication dans un congrès hal-00266551v1
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Validation of Processor Timing Models Using Cycle-Accurate Timing Simulators

 Alban Gruin , Thomas Carle , Christine Rochange , Pascal Sainrat
21st International Workshop on Worst-Case Execution Time Analysis (WCET 2023), Jul 2023, Vienne, Austria. pp.2:1-2:12, ⟨10.4230/OASIcs.WCET.2023.2⟩
Communication dans un congrès hal-04171420v1
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Predictable composition of memory accesses on many-core processors

 Quentin Perret , Pascal Maurère , Éric Noulard , Claire Pagetti , Pascal Sainrat , et al.
8th European Congress on Embedded Real Time Software and Systems (ERTS 2016), Jan 2016, TOULOUSE, France
Communication dans un congrès hal-01256000v1
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parMERASA Multi-Core Execution of Parallelised Hard Real-Time Applications Supporting Analysability

 Theo Ungerer , Christian Bradatsch , Mike Gerdes , Florian Kluge , Ralf Jahr , et al.
16th Euromicro Conference on Digital System Design (DSD 2013), Sep 2013, Santander, Spain. pp. 363-370
Communication dans un congrès hal-01231740v1
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Alternative Schemes for High-Bandwidth Instruction Fetching

 Pierre Michaud , André Seznec , Stéphan Jourdan , Pascal Sainrat
[Research Report] RR-3392, INRIA. 1998
Rapport inria-00073297v1
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Temporal isolation of hard real-time applications on many-core processors

 Quentin Perret , Pascal Maurere , Eric Noulard , Claire Pagetti , Pascal Sainrat , et al.
RTAS 2016 - IEEE Real-Time Embedded Technology & Applications Symposium, Apr 2016, Vienne, Austria. pp. 1-11, ⟨10.1109/RTAS.2016.7461363⟩
Communication dans un congrès hal-01585055v1

Architecture des processeurs pour les systèmes critiques - Haute performance et prédictibilité

 Pascal Sainrat
13ème Colloque. du Groupe de Recherche System on Chip - GdR SoC/SiP 2018, Jun 2018, Paris, France
Communication dans un congrès hal-03023425v1
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Une architecture SMT pour le temps-réel strict

 Jonathan Barre , Christine Rochange , Pascal Sainrat
2008
Pré-publication, Document de travail hal-00202828v1
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Automatic WCET Analysis of Real-Time Parallel Applications

 Haluk Ozaktas , Christine Rochange , Pascal Sainrat
13th Workshop on Worst-Case Execution Time Analysis (WCET 2013), Jul 2013, Paris, France. pp. 11-20
Communication dans un congrès hal-01239727v1

Parallelizing Industrial Hard Real-Time Applications for the parMERASA Multicore

 Theo Ungerer , Christian Bradatsch , Martin Frieb , Florian Kluge , Jörg Mische , et al.
ACM Transactions on Embedded Computing Systems (TECS), 2016, 15 (3), ⟨10.1145/2910589⟩
Article dans une revue hal-03159046v1
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Etude préparatoire à la réutilisation de chaînes

 Philippe Reynes , Thierry Haquin , Christine Rochange , Pascal Sainrat
8ème Symposium en Architectures Nouvelles de Machines, Apr 2002, Hammamet, Tunisie. pp.365-372
Communication dans un congrès hal-00266550v1
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Génération automatique de simulateurs fonctionnels de processeurs

 Tahiry Ratsiambahotra , Hugues Cassé , Christine Rochange , Pascal Sainrat
2008
Pré-publication, Document de travail hal-00202328v1
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Mapping hard real-time applications on many-core processors

 Quentin Perret , Pascal Maurere , Eric Noulard , Claire Pagetti , Pascal Sainrat , et al.
24th International Conference on Real-Time and Network Systems (RTNS 2016), Oct 2016, Brest, France. pp. 235-244
Communication dans un congrès hal-01692702v1

Verification of SimNML instruction set description using co-simulation

 Hugues Cassé , Emmanuel Caussé , Pascal Sainrat
2nd RISC-V Meeting 2019, Institut de recherche technologique Nanoelec, Grenoble, France; Commissariat à l'énergie atomique et aux énergies alternatives (CEA), France, Oct 2019, Paris, France
Communication dans un congrès hal-03012561v1
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OTAWA, a Framework for Experimenting WCET Computations

 Hugues Cassé , Pascal Sainrat
Conference ERTS'06, Jan 2006, Toulouse, France
Communication dans un congrès hal-02270434v1
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Accurate analysis of memory latencies for WCET estimation

 Roman Bourgade , Clément Ballabriga , Hugues Cassé , Christine Rochange , Pascal Sainrat
16th International Conference on Real-Time and Network Systems (RTNS 2008), Isabelle Puaut, Oct 2008, Rennes, France
Communication dans un congrès inria-00336530v1
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Minimizing the Cost of Synchronisations in the WCET of Real-Time Parallel Programs

 Haluk Ozaktas , Christine Rochange , Pascal Sainrat
17th International Workshop on Software and Compilers for Embedded Systems (SCOPES 2014), Jun 2014, Sankt Goar, Germany. pp.98-107, ⟨10.1145/2609248.2609261⟩
Communication dans un congrès hal-04080941v1
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Enabling timing predictability in the presence of store buffers

 Alban Gruin , Thomas Carle , Christine Rochange , Pascal Sainrat
31st International Conference on Real-Time Networks and Systems (RTNS 2023), Jun 2023, Dortmund, Germany. pp.1-10, ⟨10.1145/3575757.3593653⟩
Communication dans un congrès hal-04082519v1
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OTAWA: An Open Toolbox for Adaptive WCET Analysis

 Clément Ballabriga , Hugues Cassé , Christine Rochange , Pascal Sainrat
8th IFIP WG 10.2 International Workshop on Software Technologies for Embedded and Ubiquitous Systems (SEUS), Oct 2010, Waidhofen/Ybbs, Austria. pp.35-46, ⟨10.1007/978-3-642-16256-5_6⟩
Communication dans un congrès hal-01055378v1
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MINOTAuR: a Timing Predictable RISC-V Core Featuring Speculative Execution

 Alban Gruin , Thomas Carle , Christine Rochange , Hugues Cassé , Pascal Sainrat
IEEE Transactions on Computers, 2023, 72 (1), pp.183-195. ⟨10.1109/TC.2022.3200000⟩
Article dans une revue hal-03773263v1
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Predictable Two-Level Bus Arbitration for Heterogeneous Task Sets

 Roman Bourgade , Christine Rochange , Pascal Sainrat
26th International Conference on Architecture of Computing Systems (ARCS 2013), Feb 2013, Prague, Czech Republic. pp.341-351, ⟨10.1007/978-3-642-36424-2_29⟩
Communication dans un congrès hal-04084581v1
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Multiple-Block Ahead Branch Predictors

 André Seznec , Stéphan Jourdan , Pascal Sainrat , Pierre Michaud
[Research Report] RR-2825, INRIA. 1996
Rapport inria-00073867v1
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Experiences and Results of Parallelisation of Industrial Hard Real-time Applications for the parMERASA Multi-core

 Theo Ungerer , Christian Bradatsch , Martin Frieb , Florian Kluge , Jörg Mische , et al.
3rd Workshop on High-performance and Real-time Embedded Systems (HiRES 2015) in conjunction with HiPEAC 2015, Luís Miguel Pinho, CISTER, Portugal; Eduardo Quiñones, BSC, Spain; Sascha Uhrig, TU Dortmund, Germany, Jan 2015, Amsterdam, Netherlands
Communication dans un congrès hal-03190214v1
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