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Open-Scale: A Scalable, Open-Source NOC-based MPSoC for Design Space ExplorationReConFig 2011 - International Conference on Reconfigurable Computing and FPGAs, Nov 2011, Cancun, Mexico. pp.357-362, ⟨10.1109/ReConFig.2011.66⟩
Communication dans un congrès
hal-01139181v1
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Spatial EM Jamming: a Countermeasure Against EM Analysis ?VLSI-SoC'10: 18th IEEE/IFIP International Conference on VLSI and System-on-Chip, Madrid, Spain. pp.105-110
Communication dans un congrès
lirmm-00544358v1
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Providing Better Multi-Processor Systems-on-Chip Resources Utilization by Means of Using a Control-Loop Feedback MechanismReConFig 2010 - International Conference on ReConFigurable Computing and FPGAs, Dec 2010, Cancun, Mexico. pp.382-387, ⟨10.1109/ReConFig.2010.17⟩
Communication dans un congrès
lirmm-00548837v1
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MPI-Based Adaptive Task Migration Support on the HS-Scale SystemISVLSI 2008 - IEEE Computer Society Annual Symposium on VLSI, Apr 2008, Montpellier, France. pp.105-110, ⟨10.1109/ISVLSI.2008.87⟩
Communication dans un congrès
lirmm-00280687v1
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Bio-Inspiration Helps Computers: An New MachineFPL'08: The 18th International Conference on Field-Programmable Logic and Applications, Sep 2008, Heidelberg, Germany. pp.697-698
Communication dans un congrès
lirmm-00326534v1
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Application Case Studies on HS-Scale, a MP-SOC for Embbeded SystemsEmbedded Computer Systems: Architectures, Modeling and Simulation (SAMOS), Jul 2007, Samos, Greece. pp.88-95, ⟨10.1109/ICSAMOS.2007.4285738⟩
Communication dans un congrès
lirmm-00179513v1
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An Adaptative MP-SoC Architecture for Embedded SystemsCAR'07: 2nd National Workshop on Control Architectures of Robots: From Models to Execution on Distributed Control Architectures, Jun 2007, Paris, France. pp.101-107
Communication dans un congrès
lirmm-00179505v1
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HS-Scale: A Hardware-Software Scalable MP-SOC Architecture for Embedded SystemsISVLSI'07: IEEE Computer Society Annual Symposium on VLSI, 2007, Porto Allegre, Brazil, pp.21-28
Communication dans un congrès
lirmm-00154074v1
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HS Scale: A Run-Time Adaptable MP-SoC ArchitectureReCoSoC'07: International Workshop on Reconfigurable Communication Centric System-On-Chips, Jun 2007, Montpellier, France. pp.CDROM
Communication dans un congrès
lirmm-00179482v1
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Dynamic hardware multiplexing: improving adaptability with a run time reconfiguration managerISVLSI 2006 - IEEE Computer Society Annual Symposium on VLSI, Mar 2006, Karlsruhe, Germany. pp.251-256, ⟨10.1109/ISVLSI.2006.38⟩
Communication dans un congrès
lirmm-00102766v1
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Automatic Task Scheduling/Loop Unrolling Using Dedicated RTR Controllers in Coarse Grain Recongigurable ArchitecturesIPDPS'05: International Parallel and Distributed Processing Symposium, RAW'05: Reconfigurable Architectures Workshop, Apr 2005, Denver, Colorado (USA), pp.148
Communication dans un congrès
lirmm-00105985v1
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Run-Time Scheduling for Random Multi Tasking in Reconfigurable CoprocessorsFPL'05 IEEE : 15th International Workshop on Field-Programmable Logic and Applications, Aug 2005, Tampere (Finlande), pp.703-706
Communication dans un congrès
lirmm-00106057v1
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A RTR Hardware Controller for DSP Kernel Scheduling in Coarse Grain Reconfigurable ArchitectureIPDPS'05: International Parallel and Distributed Processing SymposiumRAW'05: Reconfigurable Architectures Workshop, Apr 2005, pp.485-489
Communication dans un congrès
lirmm-00105958v1
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Gestion Matérielle du Parallélisme pour les Architectures Reconfigurables à Grain EpaisJFAAA'05: Journées Francophones sur l'Adéquation Algorithme Architecture, Jan 2005, Dijon, France. pp.15-20
Communication dans un congrès
lirmm-00106510v1
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Metrics for Digital Signal Processing Architectures Characterization: Remanence and ScalabilitySAMOS 2004 - 4th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, Jul 2004, Samos, Greece. pp.128-137
Communication dans un congrès
lirmm-00269656v1
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Metrics for Reconfigurable Architectures Characterization: Remanence and ScalabilityIPDPS: International Parallel and Distributed Processing Symposium, Apr 2003, Nice, France. pp.176-180, ⟨10.1109/IPDPS.2003.1213324⟩
Communication dans un congrès
lirmm-00269655v1
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A Novel Approach for Architectural Model Characterization. An Example through the Systolic Ring.FPL 2003 - 12th International Workshop on Field-Programmable Logic and Applications, Sep 2003, Lisbon, Portugal. pp.722-732, ⟨10.1007/978-3-540-45234-8_70⟩
Communication dans un congrès
lirmm-00269558v1
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Comparaison des Architectures Dédiées au Traitement des Données NumériquesJNRDM'03 : 6ièmes Journées Nationales du Réseau Doctoral de Microélectronique, May 2003, Toulouse (France), France. pp.115-117
Communication dans un congrès
lirmm-00269542v1
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Comparaison d'Architectures Dédiées au Traitement Numériques des Données : du Processeur aux Architectures ReconfigurablesRenPar/ SympAAA/ CFSE - Rencontres Francophones en Parallélisme, Architecture, Adéquation Algorithmes Architecture et Système, Oct 2003, La Colle sur Loup, France. pp.322-326
Communication dans un congrès
lirmm-00269654v1
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Caractérisation et Comparaison d'Architectures Reconfigurables Dynamiquement, un exemple : Le Systolic RingJFAAA'02: Journées Francophones sur l'Adéquation Algorithme Architecture, Dec 2002, Monastir, Tunisie. pp.30-34
Communication dans un congrès
lirmm-00269344v1
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Architectures Reconfigurables Dynamiquement pour Applications TSIColloque du GDR CAO de Circuits et Systèmes Intégrés, May 2002, Paris, France. pp.67-70
Communication dans un congrès
lirmm-00269321v1
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Towards Self-Adaptability a Scalable MP-SOC Architecture ApproachColloque du GDR SoC-SiP, 2007, Paris, France. 2007
Poster de conférence
lirmm-00406773v1
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Dynamic Hardware Multiplexing for Coarse Grain Reconfigurable ArchitecturesFPGA'05: ACM/SIGDA 9th International Symposium on Field Programmable Gate Arrays, Feb 2005, Monterey, CA, United States. ACM Press, 2005
Poster de conférence
lirmm-00105959v1
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The Systolic Ring: A Scalable Dynamically Reconfigurable Core for Embedded SystemsSAME'02: Sophia-Antipolis Forum on MicroElectronics, Oct 2002, Sophia-Antipolis, France. pp.85-90, 2002
Poster de conférence
lirmm-00269322v1
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Towards Autonomous Scalable Integrated SystemsDesign Technology for Heterogeneous Embedded Systems, Springer, pp.63-89, 2012, 978-94-007-1124-2. ⟨10.1007/978-94-007-1125-9_4⟩
Chapitre d'ouvrage
lirmm-01399454v1
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An Introduction to Multi-Core System on Chip - Trends and ChallengesHübner, Michael; Becker, Jürgen. Multiprocessor System-on-Chip - Hardware Design and Tool Integration, Springer, pp.1-21, 2011, Chapter 1, 978-1-4419-6459-5. ⟨10.1007/978-1-4419-6460-1_1⟩
Chapitre d'ouvrage
lirmm-00574947v1
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Dynamically Reconfigurable Architectures for Digital Signal Processing ApplicationsSOC Design Methodologies, 90, Kluwer Academic Publishers 2002, pp.63-74, 2002, IFIP — The International Federation for Information Processing, 978-1-4757-6530-4. ⟨10.1007/978-0-387-35597-9_6⟩
Chapitre d'ouvrage
lirmm-00108929v1
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Architecture de Transport de Données en Anneau comprenant un Réseau de RétropopagationÉtats-Unis, N° de brevet: 0204162. 9764. 2002, pp.P/N
Brevet
lirmm-00268654v1
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Architecture de Calcul Logique comprenant plusieurs Modes de ConfigurationÉtats-Unis, N° de brevet: 0204161. 9763. 2002, pp.P/N
Brevet
lirmm-00268653v1
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