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Forecasting the effects of electromagnetic fault injections on embedded cryptosystems

D. Alberto , Paolo Maistri , Régis Leveugle
Information Security Journal: A Global Perspective, 2013, 22 (5-6), ⟨10.1080/19393555.2014.891278⟩
Article dans une revue hal-01142403v1
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HLS-Based Methodology for Fast Iterative Development Applied to Elliptic Curve Arithmetic

Simon Pontie , Alban Bourge , Adrien Prost-Boucle , Paolo Maistri , Olivier Muller , et al.
2016 Euromicro Conference on Digital System Design (DSD), 2016, Limassol, Cyprus. pp.511-518, ⟨10.1109/DSD.2016.51⟩
Communication dans un congrès hal-01389247v1

A flexible RNS-based large polynomial multiplier for Fully Homomorphic Encryption

A. Mkhinini , Paolo Maistri , Régis Leveugle , Rached Tourki , M. Machhout
11th IEEE International Design & Test Symposium (IDT'16), Dec 2016, Hammamet, Tunisia. pp.131-136
Communication dans un congrès hal-01459845v1

Electromagnetic attacks on embedded devices: a model of probe-circuit power coupling

D. Alberto , Paolo Maistri , Régis Leveugle
9th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS), May 2014, Santorini, Greece. pp.23-28, ⟨10.1109/DTIS.2014.6850648⟩
Communication dans un congrès hal-01061232v1

On the development of a new countermeasure on a laser attack RTL fault model

C. Ananiadis , A. Papadimitriou , D. Hély , V. Beroulle , Paolo Maistri , et al.
Design, Automation and Test in Europe Conference (DATE'16), Mar 2016, Dresden, Germany
Communication dans un congrès hal-01414728v1

Towards Virtual Fault-based Attacks for Security Validation

Régis Leveugle , M. Ben Jrad , Paolo Maistri
IARIA Fourth International Conference on Dependability (DEPEND'11), Aug 2011, Nice, France. pp.1-6
Communication dans un congrès hal-00643930v1

Dependability analysis of a countermeasure against fault attacks by means of laser shots onto a SRAM-based FPGA

G. Canivet , Paolo Maistri , Régis Leveugle , J. Clédière , F. Valette , et al.
21st IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 10), Jul 2010, Rennes, France. pp.115-122
Communication dans un congrès hal-00544935v1
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Electromagnetic Leakage Assessment of a Proven Higher-Order Masking of AES S-Box

Nicolas Bordes , P. Maistri
25th Euromicro Conference on Digital System Design (DSD 2022), Aug 2022, Maspalomas, Spain
Communication dans un congrès hal-03757964v1
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Secure Test with RSNs: Seamless Authenticated Extended Confidentiality

Paolo Maistri , V. Reynaud , Michele Portolan , Régis Leveugle
19th IEEE International New Circuits and Systems Conference (NEWCAS 2021), Jun 2021, Toulon, France
Communication dans un congrès hal-03287523v1
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Experimental Evaluation of Delayed-Based Detectors Against Power-off Attack

Maryam Esmaeilian , Aghiles Douadi , Zahra Kazemi , Vincent Beroulle , Mirbaha Amir-Pasha , et al.
IEEE 29th International Symposium on On-Line Testing and Robust System Design (IOLTS 2023), Jul 2023, Crete, Greece. ⟨10.1109/IOLTS59296.2023.10224876⟩
Communication dans un congrès hal-04193277v1
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The case of using CMOS FD-SOI rather than CMOS bulk to harden ICs against laser attacks

Jean-Max Dutertre , Vincent Beroulle , Philippe Candelier , Louis-Barthelemy Faber , Marie-Lise Flottes , et al.
IOLTS: International On-Line Testing Symposium, Jul 2018, Platja d’Aro, Spain. pp.214-219, ⟨10.1109/IOLTS.2018.8474230⟩
Communication dans un congrès emse-01856000v1

Software BIST capabilities of a symmetric cipher

Paolo Maistri , C. Excoffon , Régis Leveugle
International Conference on Electronics, Circuits and Systems (ICECS), Sep 2008, Saint Julians, Malta. pp.414-417
Communication dans un congrès hal-00321960v1
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Cross-Layer Inference Methodology for Microarchitecture-aware Fault Models

Ihab Alshaer , Brice Colombier , Christophe Deleuze , Paolo Maistri , Vincent Beroulle
Microelectronics Reliability, 2022, 139, ⟨10.1016/j.microrel.2022.114841⟩
Article dans une revue hal-03848691v1
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Flexible and Portable Management of Secure Scan Implementations Exploiting P1687.1 Extensions

Michele Portolan , Emanuele Valea , Paolo Maistri , Giorgio Di Natale
IEEE Design & Test, 2022, IEEE Design & Test, 39 (3), pp.117-124. ⟨10.1109/MDAT.2021.3117875⟩
Article dans une revue hal-03370952v1

HLS Design of a Hardware Accelerator for Homomorphic Encryption

A. Mkhinini , Paolo Maistri , Régis Leveugle , Rached Tourki
IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2017), Apr 2017, Dresden, Germany
Communication dans un congrès hal-01710778v1

FPGA emulation of laser attacks against secure deep submicron integrated circuits

A. Papadimitriou , D. Hély , V. Beroulle , Paolo Maistri , Régis Leveugle
7ème Colloque du GdR SoC-SiP, Jun 2013, Lyon, France
Communication dans un congrès hal-01400108v1

Countermeasures against Implementation Attacks on Private- and Public-Key Cryptosystems

Paolo Maistri
International Conference on Applications and Techniques in Information Security, Oct 2016, Cairns, Australia
Communication dans un congrès hal-01459849v1

On Fault Injections for Early Security Evaluation vs. Laser-based Attacks

Régis Leveugle , A. Chahed , Paolo Maistri , A. Papadimitriou , D. Hély , et al.
1st IEEE International Verification and Security Workshop, Jul 2016, St Feliu de Guixols, Spain. pp.33-38
Communication dans un congrès hal-01444970v1
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Harmonic Response of Ring Oscillators under Single ElectroMagnetic Pulsed Fault Injection

Sami El Amraoui , Aghiles Douadi , Régis Leveugle , Paolo Maistri
25th IEEE Latin American Test Symposium (LATS 2024), Apr 2024, Maceio (Brazil), Brazil
Communication dans un congrès hal-04513585v1
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Enhancing side-channel attacks through X-ray-induced leakage amplification

Nasr-Eddine Ouldei Tebina , Luc Salvo , Laurent Maingault , Nacer-Eddine Zergainoh , Guillaume Hubert , et al.
DATE 24 - Design, Automation and Test in Europe Conference, Mar 2024, Valence, Spain
Communication dans un congrès hal-04510854v1
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Simulation Methodology for Assessing X-Ray Effects on Digital Circuits

Nasr-Eddine Ouldei Tebina , Nacer-Eddine Zergainoh , Guillaume Hubert , Paolo Maistri
36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT 2023), Oct 2023, Juan-les-Pins, France. ⟨10.1109/DFT59622.2023.10313564⟩
Communication dans un congrès hal-04303453v1
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Non-Invasive Attack on Ring Oscillator-based PUFs through Localized X-Ray Irradiation

Nasr-Eddine Ouldei Tebina , Aghiles Douadi , Luc Salvo , Vincent Beroulle , Nacer-Eddine Zergainoh , et al.
IEEE International Symposium on Hardware Oriented Security and Trust (HOST 2024), May 2024, Washington, DC, United States
Communication dans un congrès hal-04521587v1

Evaluation of register-level protection techniques for the Advanced Encryption Standard by multi-level fault injections

Paolo Maistri , Pierre Vanhauwaert , Régis Leveugle
International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'07), Sep 2007, Rome, Italy. pp.499-507
Communication dans un congrès hal-00185903v1

Validation of RTL laser fault injection model with respect to layout information

A. Papadimitriou , M. Tampas , D. Hély , V. Beroulle , Paolo Maistri , et al.
IEEE International Symposium on Hardware Oriented Security and Trust (HOST'15), May 2015, McLean, VA, United States. pp.78-81
Communication dans un congrès hal-01393414v1

Countermeasures against fault attacks: The good, the bad, and the ugly

Paolo Maistri
17th IEEE International On-Line Testing Symposium (IOLTS'11), Jul 2011, Athenes, Greece. pp.134-137, ⟨10.1109/IOLTS.2011.5993825⟩
Communication dans un congrès hal-00651925v1
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Laser fault injection at the CMOS 28 nm technology node: an analysis of the fault model

Jean-Max Dutertre , Vincent Beroulle , Philippe Candelier , Stephan de Castro , Louis-Barthelemy Faber , et al.
FDTC: Fault Diagnosis and Tolerance in Cryptography, Sep 2018, Amsterdam, Netherlands. pp.1-6, ⟨10.1109/FDTC.2018.00009⟩
Communication dans un congrès emse-01856008v1
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Choose your Path: Control of Ring Oscillators EMFI Susceptibility through FPGA P&R Constraints

Sami El Amraoui , Régis Leveugle , Paolo Maistri
International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2024), Apr 2024, Kielce, Poland
Communication dans un congrès hal-04513560v1
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A Study of High Temperature Effects on Ring Oscillator based Physical Unclonable Functions

Aghiles Douadi , Giorgio Di Natale , Paolo Maistri , Ioana Vatajelu , Vincent Beroulle
29th IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS 2023), Jul 2023, Chania, Greece
Communication dans un congrès hal-04169632v1
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A Low-Cost Methodology for EM Fault Emulation on FPGA

Paolo Maistri , Jia Yun Po
Design, Automation and Test in Europe Conference (DATE 2022), Mar 2022, Antwerp, Belgium
Communication dans un congrès hal-03614891v1

Polynomial multipliers for Fully Homomorphic Encryption on FPGA

C. Jayet-Griffon , Marie-Angela Cornelie , Paolo Maistri , Philippe Elbaz-Vincent , Régis Leveugle
International Conference on ReConFigurable Computing and FPGAs (ReConFig'15), Dec 2015, Mayan Riviera, Mexico
Communication dans un congrès hal-01240658v1