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Nicolas Rouger
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Documents
Affiliations actuelles
- 405657
Identifiants chercheurs
- nicolas-rouger
- 0000-0002-2161-9043
- IdRef : 190456760
Site web
- https://scholar.google.fr/citations?user=K1uNl9AAAAAJ
Présentation
My field of interest is power electronics, and more particularly, power semiconductor devices. Recently, I have focused my research activity on the next generation of power semiductor devices based on widebandgap (SiC, GaN) and ultrawidebandgap materials (Diamond). For SiC and GaN, I focus on integration techniques and dedicated Silicon CMOS gate drivers to improve the performances and offer new trade-offs. For diamond, I work with pionners such as CNRS/Institut Néel and Diamfab start-up company in Grenoble, to design power semiconductor devices with outstanding performances, and implement those in the next generation of power converters.
As a scientist at CNRS/Laplace in Toulouse, I supervise grad. students, PhD students and postdocs, with my colleagues in the power converter research group, other academic colleagues and industrial partners. Since Jan. 2020, I have the privilege to be the head of this research group, composed of 35 persons, and work closely with other group leaders and laboratory board of directors, to continuously improve our activities.
I lead and actively contribute to research projects on power electronics, funded by local, national or international funding agencies, from basic science to applications towards energy transition. Notably, I am involved in the SEMA joint lab between NXP Semiconductors and CNRS (Laplace, Laas, Institut Polytechnique Toulouse, Univ. Toulouse 3 Paul Sabatier) since its creation in 2020, to innovate on electrical mobility.
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Early-stage HF-EMC Simulation Analyses of Common-Mode Current in SiC-Based Motor Drive System for Modern Aircraft ApplicationsIEEE Transactions on Transportation Electrification, 2023, pp.1-1. ⟨10.1109/TTE.2023.3311621⟩
Article dans une revue
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CMOS Active Gate Driver for Closed-Loop d v /d t Control of GaN TransistorsIEEE Transactions on Power Electronics, 2020, 35 (12), pp.13322-13332. ⟨10.1109/TPEL.2020.2995531⟩
Article dans une revue
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CMOS gate driver for SiC power modulesCongrès annuel de l'Ecole Doctorale Génie Electrique, Electronique, Télécommunications et Santé : du Système au Nanosystème - ED 323 (GEET) - Université de Toulouse, Ecole Doctorale GEET, Jun 2023, Toulouse, France. https://adum.fr/as/ed/GEET/article.pl
Communication dans un congrès
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Static and Dynamic Characterization of a 1.2 kV SiC MOSFET in Third Quadrant2023 25th European Conference on Power Electronics and Applications (EPE'23 ECCE Europe), Sep 2023, Aalborg, Denmark. pp.1-8, ⟨10.23919/epe23ecceeurope58414.2023.10264635⟩
Communication dans un congrès
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Développement de fonctionnalités rapides, précises et intégrées CMOS, pour la commutation optimale et la protection interne des onduleurs à module SiC MOSFETSYMPOSIUM DE GENIE ELECTRIQUE (SGE 2023), Jul 2023, Lille, France
Communication dans un congrès
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Contrôle ultra-rapide et intégré de dv/dt en boucle fermée lors de l’amorçage de transistors à semiconducteurs grand-gapSymposium de Génie Electrique 2021, Jul 2021, Nantes, France
Communication dans un congrès
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Modeling and Design of High Bandwidth Feedback Loop for dv/dt Control in CMOS AGD for GaN2020 32nd International Symposium on Power Semiconductor Devices and ICs (ISPSD), Sep 2020, Vienna ( virtual ), Austria. pp.106-109, ⟨10.1109/ISPSD46842.2020.9170106⟩
Communication dans un congrès
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Modular Multilevel SOI-CMOS Active Gate Driver Architecture for SiC MOSFETs2020 32nd International Symposium on Power Semiconductor Devices and ICs (ISPSD), Sep 2020, Vienna (virtual ), Austria. pp.278-281, ⟨10.1109/ISPSD46842.2020.9170181⟩
Communication dans un congrès
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Sub-nanosecond delay CMOS Active Gate Driver for Closed-Loop dv/dt Control of GaN Transistors31st IEEE International Symposium on Power Semiconductor Devices and ICs (ISPSD), May 2019, Shanghai, China. ⟨10.1109/ispsd.2019.8757693⟩
Communication dans un congrès
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A CMOS gate driver with ultra-fast dV/dt embedded control dedicated to optimum EMI and turn-on losses management for GaN power transistors2018 14th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME), Jul 2018, Prague, France. pp.105-108, ⟨10.1109/PRIME.2018.8430331⟩
Communication dans un congrès
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