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30 résultats
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triés par
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Evariste III: A new multi-FPGA system for fair benchmarking of hardware dependent cryptographic primitivesWorkshop on Cryptographic Hardware and Embedded Systems, CHES 2015, Sep 2015, st-malo, France. 2015
Poster de conférence
ujm-01219840v1
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Optimization of the PLL Based TRNG Design Using the Genetic Algorithm.IEEE International Symposium on Circuits and Systems - ISCAS 2017, May 2017, Baltimore, MD, United States. pp.2202, ⟨10.1109/ISCAS.2017.8050839⟩
Communication dans un congrès
ujm-01575708v1
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Backtracking Search for Optimal Parameters of a PLL-based True Random Number Generator2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), Mar 2020, Grenoble, France. pp.1-6, ⟨10.23919/DATE48585.2020.9116307⟩
Communication dans un congrès
hal-02937862v1
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Randomness Assessment in Oscillator Based Elementary TRNGCryptarchi 2014, Jun 2014, Annecy, France
Communication dans un congrès
ujm-01010415v1
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An adaptive embedded architecture for real-time Particle Image Velocimetry algorithms14th European Signal Processing Conference - EUSIPCO 2006, Sep 2006, Florence, Italy. pp.F6.1 R4
Communication dans un congrès
ujm-00124018v1
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Modern random number generator design – Case study on a secured PLL-based TRNGInformation Technology, 2019
Article dans une revue
ujm-01984448v1
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Evaluation of AIS-20/31 compliant TRNG cores implemented on FPGAsConference on trustworthy Manufacturing and Utilization of Secure Devices (TRUDEVICE), Nov 2016, Barcelone, Spain
Communication dans un congrès
hal-01382990v1
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True-Randomness and Pseudo-Randomness in Ring Oscillator-Based True Random Number GeneratorsInternational Journal of Reconfigurable Computing, 2010, 2010, pp.ID 879281. ⟨10.1155/2010/879281⟩
Article dans une revue
ujm-00572889v1
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Observing the randomness in RO-based TRNGReConfig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, Dec 2009, Cancun, Mexico. pp.237-242, ⟨10.1109/ReConFig.2009.57⟩
Communication dans un congrès
ujm-00460047v1
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Implementation of True Random Number Generators in (Reconfigurable) Logic Devicescryptarchi 2007, Jun 2007, Montpellier, France
Communication dans un congrès
ujm-00368929v1
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Impact of Frequency Locking on Ring Oscillating Cells in FPGAWorkshop on Practical Hardware Innovation in Security and Characterisation (PHSIC 2018), May 2018, Gardanne, France
Communication dans un congrès
ujm-01795435v1
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Evaluation of AIS-20/31 compliant TRNG cores implemented on FPGAs6th Conference on Trustworthy Manufacturing and Utilization of Secure Devices (TRUDEVICE 2016), Barcelona, 14-16 November, 2016, Nov 2016, Barcelone, Spain
Communication dans un congrès
ujm-01570128v1
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Problématiques modernes de la génération d'aléa véritable: étude approfondie d'un TRNG basé sur les PLLsJournées Nationales 2023 du GDR Sécurité Informatique, GDR Sécurité Informatique, Jun 2023, Puteaux (92), France
Communication dans un congrès
ujm-04217962v1
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Modeling and securing RO-based TRNG in FPGAs - Jitter accumulation from local and global sourcescryptarchi 2008, Jun 2008, Trégastel, France
Communication dans un congrès
ujm-00368921v1
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Enhancing Security of Ring Oscillator-based RNG implemented in FPGAField Programmable Logic and Applications- FPLA 2008, Sep 2008, Heidelberg, Germany. pp. 245-250
Communication dans un congrès
ujm-00350859v1
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A survey of AIS-20/31 compliant TRNG cores suitable for FPGA devices26th International Conference on Field - Programmable Logic and Applications, Aug 2016, Lausanne, Switzerland. pp.1 - 10, ⟨10.1109/FPL.2016.7577379⟩
Communication dans un congrès
ujm-01570124v1
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Low Cost and Precise Jitter Measurement Method for TRNG Entropy AssessmentIACR Transactions on Cryptographic Hardware and Embedded Systems, In press, 2024 (1)
Article dans une revue
ujm-04220101v2
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About the randomness in Ring Oscillator-based True Random Number Generators in FPGAsCryptographic Architectures Embedded in Reconfigurable Devices - Cryptarchi2010, Jun 2010, Paris, France
Communication dans un congrès
ujm-00665066v1
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System on chip FPGA designs of a parameterized particle image velocimetry algorithmIEEE International Symposium on Circuits and Systems, May 2006, Kos, Greece. 4 p
Communication dans un congrès
ujm-00142044v1
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An adaptive and predictive architecture for parameterised PIV algorithmsIEEE International Conference on Field Programmable Technology – ICFPT2006, Dec 2006, Bangkok, Thailand. ⟨10.1109/FPT.2006.270355⟩
Communication dans un congrès
ujm-00131490v1
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Transient Effect Ring Oscillators Leak TooIEEE Computer Society Annual Symposium on VLSI (ISVLSI 2019), Jul 2019, Miami, FL, United States
Communication dans un congrès
hal-02118620v1
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Evariste II : Modular hardware system for fair TRNG benchmarkingInternational Workshops on Cryptographic Architectures Embedded in Reconfigurable Devices - Cryptarchi 2013, Jun 2013, Fréjus, France
Communication dans un congrès
ujm-00840987v1
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Experimental Study of Locking Phenomena on Oscillating Rings Implemented in Logic DevicesIEEE Transactions on Circuits and Systems I: Regular Papers, In press, ⟨10.1109/TCSI.2019.2900017⟩
Article dans une revue
ujm-02070498v1
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Oscillator based TRNG with a certifi ed entropy rateInternational Workshops on Cryptographic Architectures Embedded in Reconfigurable Devices - CryptArchi2013, Jun 2013, Fréjus, France. pp.P96-101
Communication dans un congrès
ujm-00840973v1
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Enhancing Quality and Security of the PLL-TRNGIACR Transactions on Cryptographic Hardware and Embedded Systems, 2023, 2023 (4), pp.211-237. ⟨10.46586/tches.v2023.i4.211-237⟩
Article dans une revue
ujm-04199004v1
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Towards an oscillator based TRNG with a certified entropy rateIEEE Transactions on Computers, 2014, 2014 (mars), pp.2308423. ⟨10.1109/TC.2014.2308423⟩
Article dans une revue
ujm-00994857v1
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Efficient design of Oscillator based Physical Unclonable Functions on Flash FPGAs2nd International Verification and Security Workshop (IVSW), Jul 2017, Thessaloniki, Greece. pp.146 - 151, ⟨10.1109/IVSW.2017.8031560⟩
Communication dans un congrès
ujm-01588954v1
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EFFICIENT AES S-BOXES IMPLEMENTATION FOR NON-VOLATILE FPGASInternational Conference on Field Programmable Logic and Applications (FPL), Aug 2009, Prague, Czech Republic. pp.649-653
Communication dans un congrès
ujm-00413111v1
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A PREDICTIVE NOC ARCHITECTURE FOR VISION SYSTEMS DEDICATED TO IMAGE ANALYSISEURASIP Journal on Embedded Systems, 2007, volume 2007 (97929), pp.1-13
Article dans une revue
hal-00140526v1
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Implementation and characterization of a physical unclonable function for IoT: a case study with the TERO-PUFIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2018, 37 (1), pp.97-109. ⟨10.1109/TCAD.2017.2702607⟩
Article dans une revue
ujm-01575675v1
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