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115 résultats
Fault-tolerant adaptive routing under permanent and temporary failures for many-core systems-on-chipIEEE International On-Line Testing symposium (IOLTS'13), Jul 2013, Chania, Crete, France. pp.7-12, ⟨10.1109/IOLTS.2013.6604043⟩
Communication dans un congrès
hal-00997169v1
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Evaluating the SEE sensitivity of a 45nm SOI Multi-core Processor due to 14 MeV NeutronsIEEE Transactions on Nuclear Science, 2016, 63 (4), pp.2193 - 2200. ⟨10.1109/TNS.2016.2537643⟩
Article dans une revue
hal-01280648v1
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Framework for system design, validation and fast prototyping of multiprocessor SoCsArchitecture and Design of Distributed Embedded Systems Series: IFIP International Federation for Information Processing,, Kluwer Academic Publishers, 2001, Vol. 61
Chapitre d'ouvrage
hal-00016207v1
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Generic architecture platform for multiprocessor system-on-chip designDIPES 2000: Architecture and Design of Distributed Embedded Systems, Oct 2000, Schloß Eringerfeld, Germany. pp.53-63
Communication dans un congrès
hal-00008077v1
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Design space exploration for hardware/software codesign of multiprocessor systemsRSP 2000 : 11th International Workshop on Rapid System Prototyping, Jun 2000, Paris, France. pp.8-13, ⟨10.1109/IWRSP.2000.854975⟩
Communication dans un congrès
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Evaluating SEU fault-injection on parallel applications implemented on multicore processorsIEEE 6th Latin American Symposium on Circuits & Systems (LASCAS'15) , Feb 2015, Montevideo, Uruguay. pp.1-4
Communication dans un congrès
hal-01414576v1
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Detailed and highly parallelizable cycle-accurate network-on-chip simulation on GPGPUACM/IEEE Design Automation Conference (ASPDAC 2017), Jan 2017, Chiba/Tokyo, Japan. pp.672-677
Communication dans un congrès
hal-01523898v1
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A New Approach to Deadlock-Free Fully Adaptive Routing for High-Performance Fault-Tolerant NoCsIEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT'16), Sep 2016, Connecticut, United States
Communication dans un congrès
hal-01445867v1
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Radiation Experiments on a 28nm Single-Chip Many-core Processor and SEU error-rate predictionIEEE Transactions on Nuclear Science, 2017, 64 (1), pp.483-490. ⟨10.1109/TNS.2016.2638081⟩
Article dans une revue
hal-01459823v1
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Evidences of Stochastic Bayesian Machines Robustness Against SEUs and SETsIEEE European Conference on Radiation and its Effects on Components and Systems (RADECS'16), Sep 2016, Bremen, Germany
Communication dans un congrès
hal-01445895v1
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Efficient Fault Detection Architecture Design of Latch-Based Low Power DSP/MCU Processor16th IEEE European Test Symposium (ETS'11), May 2011, Trondheim, Norway. pp.93 - 98, ⟨10.1109/ETS.2011.20⟩
Communication dans un congrès
hal-00651920v1
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X-Ray Fault Injection: Reviewing Defensive Approaches from a Security Perspective35th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT 2022), Oct 2022, Austin, TX, United States. ⟨10.1109/DFT56152.2022.9962362⟩
Communication dans un congrès
hal-04023650v1
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On Line Power Optimization of Data Flow Multi-core Architecture Based on Vdd-Hopping for Local DVFSIntegrated Circuit and System Design, springer pp.94-104, 2011, 978-3-642-17751-4
Chapitre d'ouvrage
hal-01529251v1
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Fast Standard Cells Statistical Characterization for SSTA Based on Design of Experiment Approach in 45nm MOSFETs TechnologyIEEE European Workshop CMOS Variability (VARI'11), May 2011, Grenoble, France
Communication dans un congrès
hal-01445905v1
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Low Cost Rollback to Improve Fault-Tolerance in VLSI CircuitsIEEE International Symposium on Circuits and Systems (LASCAS 2017), Feb 2017, Bariloche, Argentina. pp.1-4
Communication dans un congrès
hal-01523903v1
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Hardware/Software Co-designDesign of Systems on a Chip : Design and Test, Springer, pp.133 - 158, 2007, 978-0-387-32499-9. ⟨10.1007/0-387-32500-X_7⟩
Chapitre d'ouvrage
istex
hal-02124753v1
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A Real Time Multiprocessor Application Development Environment Design And ImplementationIEEE Workshop on Parallel and Distributed Processing, Jan 1994, Malaga, Spain
Communication dans un congrès
hal-01445868v1
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Fault-Tolerant Adaptive Routing under an Unconstrained Set of Node and Link Failures for Many-Core Systems-on-ChipMicroprocessors and Microsystems: Embedded Hardware Design , 2014, 38 (6), pp.620-635. ⟨10.1016/j.micpro.2014.04.003⟩
Article dans une revue
hal-01142543v1
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Delay Correction in RTL Models of DSP SoC obtained by IP-based design approachRevue des Sciences et Technologies de l'Information - Série TSI : Technique et Science Informatiques, 2005, 24/10, pp.1227-1257
Article dans une revue
hal-00079196v1
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Low Runtime-Overhead Software Synthesis for Communicating Concurrent ProcessesIEEE/IFIP International Workshop on Rapid System Prototyping (RSP'07), May 2007, Porto Alegre, Brazil. pp.195-201, ⟨10.1109/RSP.2007.27⟩
Communication dans un congrès
hal-00265159v1
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Towards design and validation of mixed-technology SOCsGreat Lakes Symposium on VLSI (GSLVLSI 2000), 2000, Chicago (Illinois), United States. pp.29 - 33, ⟨10.1145/330855.330950⟩
Communication dans un congrès
hal-00007757v1
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IP-block-based design environment for high-throughput VLSI dedicated digital signal processing systemsAsia and South Pacific Design Automation Conference (ASP-DAC'05), Jan 2005, Shanghai, China. pp.612-618
Communication dans un congrès
hal-00008000v1
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Multilanguage design of heterogeneous systemsSeventh International Workshop on Hardware/Software Codesign (CODES'99), 1999, Rome, France. pp.54-58, ⟨10.1145/301177.301206⟩
Communication dans un congrès
hal-00008102v1
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An efficient methodology and semi automated flow for design and validation of complex digital signal processing ASICS macro cells14th IEEE International Workshop on Rapid Systems Prototyping (RSP 2003), 2003, San Diego (Californie), United States. pp.56-63, ⟨10.1109/IWRSP.2003.1207030⟩
Communication dans un congrès
hal-00008051v1
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Matlab based environment for designing DSP systems using IP blocksThe 12th Workshop on Synthesis and System Integration of Mixed Information technologies (SASIMI'04), Oct 2004, Kanazawa, Japan. pp.296 - 302
Communication dans un congrès
hal-00185596v1
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Sensitivity to neutron radiation of a 45 nm SOI multi-core processorConference on Radiation Effects on Components and Systems (RADECS 2015), Sep 2015, Moscow, Russia. IEEE, Proceedings of the 15th European Conference on Radiation and Its Effects on Components and Systems (RADECS 2015), pp.1-4, 2015, ⟨10.1109/RADECS.2015.7365665⟩
Poster de conférence
in2p3-01192594v1
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Variability-aware Task mapping strategies for Many-cores processor chipsWorkshop on Design for Reliability and Variability (DRVW'11), May 2011, Dana Point, CA, United States
Communication dans un congrès
hal-00624244v1
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Ray-Spect: Local Parametric Degradation for Secure Designs29th IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS 2023), Jul 2023, Chania, Greece. pp.1-7
Communication dans un congrès
hal-04172463v1
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Towards a High-Throughput and Low Power Reconfigurable Architecture of Advanced OFDM Modulator for Software-Defined Radio SystemsIEEE International Midwest Symposium on Circuits and Systems (MWSCAS'07), Aug 2007, Montréal, Canada. pp.1205-1208, ⟨10.1109/NEWCAS.2007.4488010⟩
Communication dans un congrès
hal-00288566v1
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Reducing Rollback Cost in VLSI Circuits to Improve Fault ToleranceIEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2018, 26 (8), pp.1438-1451. ⟨10.1109/TVLSI.2018.2818021⟩
Article dans une revue
hal-01899156v1
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