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55 résultats
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T-Proc: An Embedded IEEE1500-Wrapped Cores TesterPRIME IEEE Conference on Ph.D. Research in MicroElectronics and Electronics, Jun 2006, Otranto, Italy. pp.493-496, ⟨10.1109/RME.2006.1690001⟩
Communication dans un congrès
hal-01336647v1
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Arbitrary Reduced Precision for Fine-grained Accuracy and Energy Trade-offsMicroelectronics Reliability, 2021, ⟨10.1016/j.microrel.2021.114099⟩
Article dans une revue
hal-03332179v1
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Impact of Cluster Size on Routability, Testability and Robustness of a Cluster in a Mesh FPGAIEEE Computer Society Annual Symposium on VLSI (ISVLSI'14), Jul 2014, Tampa, FL, United States. pp.553-558, ⟨10.1109/ISVLSI.2014.66⟩
Communication dans un congrès
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Contributions to the Test, Fault Tolerance and Approximate Computing of System on a ChipMicro and nanotechnologies/Microelectronics. Université Grenoble Alpes, 2023
HDR
tel-04254489v1
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Fault-Tolerant Adaptive Routing under an Unconstrained Set of Node and Link Failures for Many-Core Systems-on-ChipMicroprocessors and Microsystems: Embedded Hardware Design , 2014, 38 (6), pp.620-635. ⟨10.1016/j.micpro.2014.04.003⟩
Article dans une revue
hal-01142543v1
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STEPS: experimenting a new software-based strategy for testing SoCs containing P1500-compliant IP coresDATE 2004 - Design Automation and Test in Europe Conference, Feb 2004, Paris, France. pp.712-713, ⟨10.1109/DATE.2004.1268943⟩
Communication dans un congrès
hal-01521098v1
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CAS-BUS: A Scalable and Reconfigurable Test Access Mechanism for Systems on a ChipDesign Automation and Test in Europe Conference (DATE'2000), Mar 2000, Paris, France. pp.141-145, ⟨10.1109/DATE.2000.840030⟩
Communication dans un congrès
hal-01573606v1
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Fault-tolerant adaptive routing under permanent and temporary failures for many-core systems-on-chipIEEE International On-Line Testing symposium (IOLTS'13), Jul 2013, Chania, Crete, France. pp.7-12, ⟨10.1109/IOLTS.2013.6604043⟩
Communication dans un congrès
hal-00997169v1
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Test and Reliability in Approximate ComputingJournal of Electronic Testing: : Theory and Applications, 2018, 34 (4), pp.375-387. ⟨10.1007/s10836-018-5734-9⟩
Article dans une revue
hal-01961787v1
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FPU Bit-Width Optimization for Approximate Computing: A Non-Intrusive Approach15th Design & Technology of Integrated Systems in Nanoscale Era (DTIS 2020), Apr 2020, Marrakech, Morocco. ⟨10.1109/DTIS48698.2020.9080931⟩
Communication dans un congrès
hal-03331714v1
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Fault Resilient Intra-die and Inter-die Communication in 3D Integrated SystemsPhD Research in Microelectronics and Electronics Conference, PRIME 2010, May 2010, Berlin, Germany
Communication dans un congrès
hal-00505273v1
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Configurable Fault-Tolerant Link for Inter-die Communication in 3D on-Chip NetworksEuropean Test Symposium (ETS'10), May 2010, Prague, Czech Republic. pp.258
Communication dans un congrès
hal-00505308v1
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Online test and monitoring of multiprocessor socs : A software-based approachLATW’09 : the 10th Latin America Test Workshop, Mar 2009, Buzios, Rio de Janeiro, Brazil. pp.1-6, ⟨10.1109/LATW.2009.4813798⟩
Communication dans un congrès
hal-01297933v1
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LearnV: A Hardware/Software RISC V Based platform for Research and EducationColloque National du GDR SoC2 2019, Jun 2019, Montpellier, France
Communication dans un congrès
hal-02614531v1
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Configurable Serial Fault-Tolerant Link for Communication in 3D Integrated SystemsInternational On-Line Test Symposium (IOLTS'10), Jul 2010, Corfu, Greece. pp.115-120
Communication dans un congrès
hal-00505276v1
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Kth-Aggressor Fault (KAF)-based Thru-Silicon-Via Interconnect Built-In Self-Test and DiagnosisJournal of Electronic Testing: : Theory and Applications, 2012, 28, pp.Online First™, 3 August. ⟨10.1007/s10836-012-5322-3⟩
Article dans une revue
istex
hal-00744561v1
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At-Speed Testing of Core-Based System-On-Chip Using an Embedded Micro-TesterVTS IEEE VLSI Test Symposium, May 2007, Berkeley, California, United States. pp.447-454, ⟨10.1109/VTS.2007.16⟩
Communication dans un congrès
hal-01311492v1
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Software-Based Self-Test of Register Files in RISC Processor Cores using March AlgorithmsLATW IEEE Latin-American Test Workshop digest of papers, Mar 2006, Buenos Aires, Argentina. pp.67-72
Communication dans un congrès
hal-01338232v1
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Distributed online software monitoring of manycore architectures16th IEEE International On-Line Testing Symposium, Jul 2010, Corfou Island, Greece. pp.56-61, ⟨10.1109/IOLTS.2010.5560232⟩
Communication dans un congrès
hal-01291845v1
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Controlling the CAS-BUS TAM with IEEE 1149.1 TAP: A Solution for Systems-On-a-Chip Testing4th IEEE International Workshop on Testing Embedded Core-based Systems (TECS'00), May 2000, Montréal, Canada
Communication dans un congrès
hal-01573057v1
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Fully Distributed Initialization Procedure for a 2D-Mesh NoC, Including Off Line BIST and Partial Deactivation of Faulty ComponentsThe 16th IEEE International On-Line Testing Symposium (IOLTS), Jun 2010, Corfu, Greece. pp.194-196, ⟨10.1109/IOLTS.2010.5560209⟩
Communication dans un congrès
hal-00591795v1
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Teaching basic computer architecture, assembly language programming, and operating system design using RISC-VRISC V week 2019, Oct 2019, Paris, France
Communication dans un congrès
hal-02614532v1
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Cost-efficient of a cluster in a mesh SRAM-based FPGAIEEE 20th International On-Line Testing Symposium (IOLTS'14), Jul 2014, Platja d'Aro, Girona, Spain. pp.75-80
Communication dans un congrès
hal-01400623v1
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Adaptive Routing for Fault Tolerance and Congestion Avoidance for 2D Mesh and Torus NoCs in Many-Core Systems-on-ChipAdvances in Microelectronics: Reviews, ifsa, international frequency sensor association, pp.405-435, 2017, 978-84-615-9012-4
Chapitre d'ouvrage
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Testing TAPed Cores and Wrapped Cores With The Same Test Access MechanismDATE 2001 - IEEE Design Automation and Test in Europe, Mar 2001, Munich, Germany. pp.150-155, ⟨10.1109/DATE.2001.915016⟩
Communication dans un congrès
hal-01571032v1
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Application-independent testing of multilevel interconnect in mesh-based FPGAsIEEE 10th International Conference on Design and Technologies for Integrated System in Nanoscale (DTIS'15), Apr 2015, Naples, Italy. pp.1-6
Communication dans un congrès
hal-01400596v1
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Teaching Hardware/Software co-design using Rocket ChipRISC V Workshop 2019, Jun 2019, Zurich, Switzerland
Communication dans un congrès
hal-02614529v1
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Efficient Fault-Tolerant Adaptive Routing under an unconstrained Set of Node and Link Failures for Many Cores System On ChipWorkshop on Dependable Multicore and Transactional Memory Systems (DMTM'14), (joint to HIPEAC event), Jan 2014, Vienna, Austria. pp.1-2
Communication dans un congrès
hal-01128367v1
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Mapping an obstacles detection, stereo vision-based, software application on a multi-processor system-on-chipIV 2006 - IEEE Intelligent Vehicles Symposium, Jun 2006, Tokyo, Japan. pp.370-376, ⟨10.1109/IVS.2006.1689656⟩
Communication dans un congrès
hal-00103535v1
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Localization of Damaged Resources in NoC Based Shared-Memory MP2SOC, using a Distributed Cooperative Configuration InfrastructureThe 29th IEEE VLSI Test Symposium (VTS), May 2011, Dana Point, California, United States
Communication dans un congrès
hal-00591807v1
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