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20 résultats
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Software Defined Radio Architecture Survey for Cognitive TestbedsIWCMC 2012 : 8th International Wireless Communications and Mobile Computing Conference, Aug 2012, Limassol, Cyprus
Communication dans un congrès
hal-00736995v1
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Fine-Grain Iterative Compilation for WCET EstimationWCET 2018 - 18th International Workshop on Worst-Case Execution Time Analysis, Jul 2018, Barcelona, Spain. pp.1-12, ⟨10.4230/OASIcs.WCET.2018.9⟩
Communication dans un congrès
hal-01889944v1
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High-Level Early Power Estimation of FPGA IP Based on Machine LearningICECS 2022 29th IEEE International Conference on Electronics, Circuits & Systems, Oct 2022, Glasgow, United Kingdom. ⟨10.1109/ICECS202256217.2022.9970952⟩
Communication dans un congrès
hal-03771132v1
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A Fast Heuristic to Pipeline SDF GraphsEmbedded Computer Systems: Architectures, Modeling, and Simulation, Jul 2020, Pythagorion, Samos Island, Greece. pp.139-151, ⟨10.1007/978-3-030-60939-9_10⟩
Communication dans un congrès
hal-02993338v1
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High-Level Power Estimation Techniques in Embedded Systems Hardware: an OverviewJournal of Supercomputing, 2023, 79, pp.3771-3790. ⟨10.1007/s11227-022-04798-5⟩
Article dans une revue
hal-03770344v1
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Reconciling Compiler Optimizations and WCET Estimation Using Iterative CompilationRTSS 2019 - 40th IEEE Real-Time Systems Symposium, Dec 2019, Hong Kong, China. pp.1-13
Communication dans un congrès
hal-02286164v1
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Compilation for heterogeneous SoCs : bridging the gap between software and target-specific mechanismsworkshop on High Performance Energy Efficient Embedded Systems - HIPEAC, Jan 2014, Vienne, Austria
Communication dans un congrès
hal-00936924v1
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Wordlength Optimization for Custom Floating-point SystemsProceedings of the 2024 Conference on Design & Architectures for Signal & Image Processing (DASIP), In press
Article dans une revue
hal-04457903v1
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Automated Training Data Construction using Measurements for High-Level Learning-Based FPGA Power ModelingIEEE International Conference on Smart Systems and Power Management (IC2SPM 2022), Nov 2022, Beirut, Lebanon
Communication dans un congrès
hal-03793988v1
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Hardware Implementation of the GPS authenticationReConFig - International Conference on ReConFigurable Computing and FPGAs, Dec 2012, Cancun, Mexico
Communication dans un congrès
hal-00737003v1
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Dataflow Algorithm aRchitecture co-design of SKA pipeline for Exascale Radio AstronomyISC High Performance 2021, Jun 2021, Virtual conference, France. pp.1
Poster de conférence
hal-03233205v2
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Adaptive digital pre-distortion for future wireless transmittersIEEE ICECS, Dec 2015, Le Caire, Egypt
Communication dans un congrès
hal-02412210v1
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High-Level Online Power Monitoring of FPGA IP Based on Machine LearningWorkshop on Design and Architectures for Signal and Image Processing, Jan 2023, Toulouse, France
Communication dans un congrès
hal-03907773v1
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A New Compilation Flow for Software-Defined Radio Applications on Heterogeneous MPSoCsACM Transactions on Architecture and Code Optimization, 2016, 13 (2), ⟨10.1145/2910583⟩
Article dans une revue
hal-01396143v1
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Cognitive Radio Programming: Existing Solutions and Open Issues[Research Report] RR-8358, INRIA. 2013, pp.27
Rapport
hal-00859467v1
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Automated Buffer Sizing of Dataflow Applications in a High-Level Synthesis WorkflowACM Transactions on Reconfigurable Technology and Systems (TRETS), 2024, 17 (1), pp.1-26. ⟨10.1145/3626103⟩
Article dans une revue
hal-04237266v1
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Co-optimizing Dataflow Graphs and Actors with MLIR2022 IEEE Workshop on Signal Processing Systems (SiPS), Nov 2022, Rennes, France
Communication dans un congrès
hal-03845902v1
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Compilation d'applications flot de données paramétriques pour MPSoC dédiés à la radio logicielleRéseaux et télécommunications [cs.NI]. INSA de Lyon, 2014. Français. ⟨NNT : 2014ISAL0102⟩
Thèse
tel-01175813v2
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Contrôle d'application flot de données pour les systèmes sur puces : étude de cas sur la plateforme MagaliComPAS 2014 : conférence en parallélisme, architecture et systèmes, Apr 2014, Neuchâtel, Suisse. pp.1 - 12
Communication dans un congrès
hal-00984310v1
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A Compilation Flow for Parametric Dataflow: Programming Model, Scheduling, and Application to Heterogeneous MPSoCInternational Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES), Oct 2014, New Dehli, India. pp.1-10, ⟨10.1145/2656106.2656110⟩
Communication dans un congrès
hal-01048649v1
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