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165 résultats
AMS System-level exploration and verification using UVM in SystemC and SystemC AMS2nd Workshop Design Automation for Understanding Hardware Designs (DUHDe), Mar 2015, Grenoble, France
Communication dans un congrès
hal-02535807v1
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Design and Modeling of 8-Bit Successive Approximation Analog to Digital ConverterColloque GDR SOC-SIP : System-On-Chip, System-In-Package, Jun 2010, Paris, France. pp.1-2
Communication dans un congrès
hal-02535544v1
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A Design Environment for Analog IPs Design Knowledge Capture and MigrationColloque GDR SOC-SIP : System-On-Chip, System-In-Package, Jun 2010, Paris, France. pp.1-2
Communication dans un congrès
hal-02535551v1
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From filters to transistors A library of analog schematic with automated sizing Team: FOSS EDA for analog and mixed circuit designFree Silicon Conference, LIP6, Mar 2019, Paris, France
Communication dans un congrès
hal-02316744v1
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An Adaptive Mesh Refinement Strategy of Substrate Modeling for Smart Power ICsIEEE International Symposium on Circuits and Systems (ISCAS 2016), May 2016, Montreal, Canada. pp.2358-2361, ⟨10.1109/ISCAS.2016.7539058⟩
Communication dans un congrès
hal-01360469v1
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Computing Systematic Offsets in Amplifiers Using Hierarchical Graph-Based Sizing and BiasingICM International Conference on Microelectronics, Dec 2007, Le Caire, Egypt. pp.391-394, ⟨10.1109/ICM.2007.4497736⟩
Communication dans un congrès
hal-01306185v1
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Hierarchical Static Timing Analysis at Bull with HiTasDesign Automation and Test in Europe Conference User Forum (DATE'2000), Mar 2000, Paris, France. pp.55-60
Communication dans un congrès
hal-01573604v1
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Enriching UVM in SystemC with AMS extensions for randomization and coverageDesign and Verification Conference and Exhibition (DVCON Europe), Oct 2014, Munich, Germany
Communication dans un congrès
hal-01217217v1
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Méthode de modélisation haut-niveau de dispositifs MEMS en SystemC-AMSNeuvième colloque du GDR SOC-SIP du CNRS, Jun 2014, Paris, France. pp.3
Communication dans un congrès
hal-01215646v1
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A Structured DC Analysis Methodology for Accurate Verification of Analog CircuitsIEEE International Symposium on Circuits and Systems (ISCAS), May 2013, Beijing, China. pp.2662-2665, ⟨10.1109/ISCAS.2013.6572426⟩
Communication dans un congrès
hal-01215995v1
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Design Considerations for Low Gain Amplifier in the MDAC of Digitally Calibrated Pipelined ADCsIFIP/IEEE 21st International Conference on Very Large Scale Integration, VLSI-SoC 2013, Oct 2013, Istanbul, Turkey. pp.23-26, ⟨10.1109/VLSI-SoC.2013.6673239⟩
Communication dans un congrès
hal-01217827v1
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Dimensionnement automatique d'un circuit analogique à l'aide des transistors de référenceTAISA Colloque sur le Traitement Analogique de l'Information du Signal et ses Applications, Oct 2006, Strasbourg, France. pp.89-92
Communication dans un congrès
hal-01338476v1
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Automatic model refinement of GmC integrators for high-level simulation of continuous-time Sigma-Delta modulatorsISCAS'09 - IEEE International Symposium on Circuits and Systems, May 2009, Taipei, Taiwan. pp.2769-2772, ⟨10.1109/ISCAS.2009.5118376⟩
Communication dans un congrès
hal-00627057v1
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Filtering Adjacent Channel Blockers using Signal-Transfer-Function of Continuous-Time Sigma-Delta ModulatorsMWSCAS 2004 - 47th Midwest Symposium on Circuits and Systems, Jul 2004, Hiroshima, Japan. pp.329-332, ⟨10.1109/MWSCAS.2004.1353994⟩
Communication dans un congrès
hal-01496198v1
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Systematic Approach for Discrete-Time to Continuous-Time Transformation of Sigma-Delta ModulatorsIEEE International Symposium on Circuits and Systems (ISCAS'2002), May 2002, Phoenix, AZ, United States. pp.229-232, ⟨10.1109/ISCAS.2002.1010431⟩
Communication dans un congrès
hal-01544238v1
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Layout-Oriented Synthesis of High Performance Analog CircuitsDesign Automation and Test in Europe Conference (DATE'2000), Mar 2000, Paris, France. pp.53-57, ⟨10.1109/DATE.2000.840015⟩
Communication dans un congrès
hal-01573607v1
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A Language to Design Generators of Analog FunctionsFDL 2004 - Forum on Specification & Design Languages, Sep 2004, Lille, France. pp.30-31
Communication dans un congrès
hal-01521134v1
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A Layout Approach for Electrical and Physical Design Integration of High-Performance Analog Circuits1st International Symposium on Quality Electronic Design (ISQED 2000), Mar 2000, San Jose, CA, United States. pp.291-298, ⟨10.1109/ISQED.2000.838885⟩
Communication dans un congrès
hal-01573064v1
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An Interface between System-level and Circuit-level for Design of Mixed-Signal SystemsColloque GDR SOC-SIP, Jun 2012, Paris, France. pp.1-2
Communication dans un congrès
hal-02535736v1
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Automated Hierarchical Knowledge-Based Synthesis for Analog Cells using CAIRO+Design Automation and Test in Europe Conference (DATE'2006), Mar 2006, Munich, Germany
Communication dans un congrès
hal-02534544v1
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Placement Optimal d'Objets Déformables dans l'Environnement de Conception Analogique CAIRO+Troisième Colloque du GDR CAO de circuits et systèmes intégrés, May 2002, Paris, France. pp.29-32
Communication dans un congrès
hal-02532978v1
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Design of a 4th-Order Feed-Forward-Compensated Operational Amplifier for Multi-GHz Sampling Frequency Continuous-Time Bandpass Sigma-Delta Modulators2019 IEEE International Symposium on Circuits and Systems (ISCAS), May 2019, Sapporo, Japan. ⟨10.1109/ISCAS.2019.8702147⟩
Communication dans un congrès
hal-02145589v1
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Systematic design of continuous-time ΣΔ modulator with VCO-based quantizerISCAS 2010 - IEEE International Symposium on Circuits and Systems, May 2010, Paris, France. pp.29 - 32, ⟨10.1109/ISCAS.2010.5537115⟩
Communication dans un congrès
hal-00626955v1
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Automatic Synthesis and Simulation of Continuous-Time Sigma Delta ModulatorsDATE 2004 - Design Automation and Test in Europe Conference, Feb 2004, Paris, France. pp.674-675, ⟨10.1109/DATE.2004.1268925⟩
Communication dans un congrès
hal-01521097v1
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Using CAD Tool for Substrate Parasitic Modeling in Smart Power TechnologyIEEE Transactions on Circuits and Systems I: Regular Papers, 2016, pp.2323 - 2333. ⟨10.1109/TCSI.2016.2618622⟩
Article dans une revue
hal-01397654v1
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Hierarchical Graph-Based Sizing for Analog Cells Through Reference TransistorsPRIME IEEE Conference on Ph.D. Research in MicroElectronics and Electronics Winner of the Bronze Leaf Certificate, Jun 2006, Otranto, Italy. pp.321-324, ⟨10.1109/RME.2006.1689961⟩
Communication dans un congrès
hal-01338246v1
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Holistic modelling of heterogeneous embedded systems with high multi-discipline feedback : application to a precollision mitigation braking systemDesign, Automation & Test in Europe, DATE 2012, 2012, Dresden, Germany. pp.739-744
Communication dans un congrès
hal-00801059v1
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Analog design reuse : a case study. Very low-voltage analog Sigma-Delta modulator2001, pp.353-360
Communication dans un congrès
hal-00152205v1
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SystemC-AMS Simulation of Biaxial Accelerometer based on MEMS Reduced-Order ModelingSymposium on Design, Test, Integration and Packaging of MEMS/MOEMS, DTIP 2015, Apr 2015, Montpellier, France. pp.1-6, ⟨10.1109/DTIP.2015.7160987⟩
Communication dans un congrès
hal-01216673v1
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BIST-Assisted Analog Fault Diagnosis26th IEEE European Test Symposium, May 2021, Bruges (virtual), Belgium. pp.1-6, ⟨10.1109/ETS50041.2021.9465386⟩
Communication dans un congrès
hal-03181937v1
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