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LD
Luigi Dilillo
7
Documents
Identifiants chercheurs
- luigi-dilillo
- IdRef : 18891885X
- 0000-0002-1295-2688
Présentation
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Fast Power Evaluation for Effective Generation of Test Programs Maximizing Peak Power ConsumptionJournal of Low Power Electronics, 2013, 9 (2), pp.253-263. ⟨10.1166/jolpe.2013.1259⟩
Article dans une revue
lirmm-00934937v1
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Exploring the impact of functional test programs re-used for power-aware testingDATE 2015 - 18th Design, Automation and Test in Europe Conference and Exhibition, Mar 2015, Grenoble, France. pp.1277-1280, ⟨10.7873/DATE.2015.1031⟩
Communication dans un congrès
lirmm-01272937v1
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An effective ATPG flow for Gate Delay FaultsDTIS: Design and Technology of Integrated Systems in Nanoscale Era, Apr 2015, Naples, Italy. ⟨10.1109/DTIS.2015.7127350⟩
Communication dans un congrès
lirmm-01272719v1
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Scan-chain intra-cell defects gradingDTIS: Design and Technology of Integrated Systems in Nanoscale Era, Apr 2015, Naples, Italy. ⟨10.1109/DTIS.2015.7127349⟩
Communication dans un congrès
lirmm-01272696v1
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An intra-cell defect grading toolDDECS: Design and Diagnostics of Electronic Circuits and Systems, Apr 2014, Warsaw, Poland. pp.298-301, ⟨10.1109/DDECS.2014.6868814⟩
Communication dans un congrès
lirmm-01248591v1
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A Comprehensive Evaluation of Functional Programs for Power-Aware TestNATW: North Atlantic Test Workshop, May 2014, Johnson City, NY, United States. pp.69-72, ⟨10.1109/NATW.2014.23⟩
Communication dans un congrès
lirmm-01248597v1
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Peak Power Estimation: A Case Study on CPU CoresIEEE Asian Test Symposium, Nov 2012, Niigata, Japan. pp.167-172, ⟨10.1109/ATS.2012.58⟩
Communication dans un congrès
lirmm-00805389v1
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