- 3
LD
Luigi Dilillo
3
Documents
Identifiants chercheurs
- luigi-dilillo
- IdRef : 18891885X
- 0000-0002-1295-2688
Présentation
Publications
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SoC Yield Improvement - Using TMR Architectures for Manufacturing Defect Tolerance in Logic CoresInternational Journal On Advances in Systems and Measurements, 2010, 3 (1/2), pp.1-10
Article dans une revue
lirmm-00553567v1
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Using TMR Architectures for SoC Yield ImprovementVALID'09: The First International Conference on Advances in System Testing and Validation Lifecycle, 2009, Porto, Portugal. pp.155-160
Communication dans un congrès
lirmm-00406967v1
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SoC Yield Improvement for Future Nanoscale TechnologiesETS 2009 - 14th IEEE European Test Symposium | PhD Forum, May 2009, Sevilla, Spain. 2009
Poster de conférence
lirmm-00433798v1
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