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Method to increase the switching speed of MOS transistors by dynamic bias of the bulk

 F. Mitu , G. Brezeanu , G. Dilimot , Lorena Anghel , I. Enache
1995-International-Semiconductor-Conference.-CAS'95-Proceedings-Cat.-No.95TH8071, 1995, Sinaia, France. pp.241-4, ⟨10.1109/SMICND.1995.494907⟩
Communication dans un congrès hal-00015787v1

On the Dependability of 3D Interconnects

 Lorena Anghel
Ecole d'hiver Francophone sur les Technologies de Conception des Systèmes embarqués Hétérogènes (FETCH'12), Jan 2012, Alpes d'Huez, France
Communication dans un congrès hal-00677047v1
Image document

Dependable Multicore Architectures at Nanoscale: The View From Europe

 M. Ottavi , S. Pontarelli , D. Gizopoulos , C. Bolchini , M.K. Michael , et al.
IEEE Design & Test, 2015, 32 (2), pp.17-28. ⟨10.1109/MDAT.2014.2359572⟩
Article dans une revue hal-01334167v1

Binary Bayesian Neural Networks for Efficient Uncertainty Estimation Leveraging Inherent Stochasticity of Spintronic Devices

 Soyed Tuhin Ahmed , Kamal Danouchi , Christopher Münch , Guillaume Prenat , Anghel Lorena , et al.
NANOARCH '22: 17th ACM International Symposium on Nanoscale Architectures, Dec 2022, Virtual OR USA, United States. pp.1-6, ⟨10.1145/3565478.3572536⟩
Communication dans un congrès hal-04149770v1

Design-time exploration for process, environment and aging compensation techniques for low power reliable-Aware design

 Lorena Anghel , Florian Cacho
IEEE Transactions on Emerging Topics in Computing, 2022, 10 (2), pp.581-590. ⟨10.1109/TETC.2021.3136288⟩
Article dans une revue hal-03599345v1

Managing Aging Induced Reliability at Run-time

 Lorena Anghel
7th Workshop on Cross-layer Resiliency (IWCR'2019), Jul 2019, Stuttgart, Germany
Communication dans un congrès hal-02457526v1

Neuromorphic Circuits

 Lorena Anghel
L’Intelligence Naturelle au cœur des enjeux de l’Intelligence Artificielle – Les atouts du site grenoblois, Jul 2018, Grenoble, France
Communication dans un congrès hal-02473890v1

Asynchronous Current Monitors for Transient Fault Detection in Deep Submicron CMOS

 T. Calin , Lorena Anghel , M. Nicolaidis
4th IEEE International On-Line Testing Workshop (IOLTW'98), Jul 1998, Capri, Italy
Communication dans un congrès hal-01413136v1

Application-independent testing of multilevel interconnect in mesh-based FPGAs

 Saif-Ur Rehman , Mounir Benabdenbi , Lorena Anghel
IEEE 10th International Conference on Design and Technologies for Integrated System in Nanoscale (DTIS'15), Apr 2015, Naples, Italy. pp.1-6
Communication dans un congrès hal-01400596v1

Designing Single Chip Massively Parallel Processors Affected by Extreme Failure Rates

 M. Nicolaidis , Lorena Anghel , Nacer-Eddine Zergainoh , D. Avresky
Design, Automation & Test in Europe Conference & Exhibition (DATE'12), Mar 2012, Dresden, Germany
Communication dans un congrès hal-01408773v1

On the Dependability of 3D Interconnects

 Lorena Anghel , M. Nicolaidis , V. Pasca
Dependability Issues in Deep-submicron Technologies Workshop (DDT'11), May 2011, Trondheim, Norway
Communication dans un congrès hal-00650195v1

Checkpoint and rollback recovery in network-on-chip based systems

 C. Rusu , Lorena Anghel
Student forum at 15th Asia and South Pacific Design Automation Conference (ASP-DAC'10), Jan 2010, Taipei, Taiwan
Communication dans un congrès hal-00505319v1

Resistance Increase Due to Electromigration Induced Depletion Under TSV

 T. Frank , C. Chappaz , P. Leduc , L. Arnaud , S. Moreau , et al.
IEEE International Reliability Physics Symposium (IRPS'11), Monterey, CA, USA, April 10-14, Apr 2011, Monterey, ca., United States. pp.3F.4.1 - 3F.4.6, ⟨10.1109/IRPS.2011.5784499⟩
Communication dans un congrès hal-00599391v1

Transient and permanent fault tolerance memory cells for unreliable future nanotechnologies

 Lorena Anghel , E. Kolonis , M. Nicolaidis
IEEE Latin American Test Workshop (LATW'05), Mar 2005, Salvador Bahia, Brazil. pp.187-192
Communication dans un congrès hal-00457112v1

Efficient Fault-Tolerant Adaptive Routing under an unconstrained Set of Node and Link Failures for Many Cores System On Chip

 M. Dimopoulos , Yi Gang , Mounir Benabdenbi , Lorena Anghel
Workshop on Dependable Multicore and Transactional Memory Systems (DMTM'14), (joint to HIPEAC event), Jan 2014, Vienna, Austria. pp.1-2
Communication dans un congrès hal-01128367v1

Improving the Scalability of Checkpoint Recovery for Networks-on-Chip

 C. Rusu , C. Grecu , Lorena Anghel
IEEE International Symposium on Circuits and Systems (ISCAS'08), Seattle, May 2008, Washington, United States. pp.2793-2796, ⟨10.1109/ISCAS.2008.4542037⟩
Communication dans un congrès hal-00378206v1

A Transistor Placement Technique Using Genetic Algorithm And Analytical Programming

 C. Lazzari , Lorena Anghel , Ricardo Reis
VLSI-SOC: From Systems to Silicon, (selected contributions from VLSI-SoC'05), Springer, pp.331-344, Vol.240, 2007, Series: IFIP International Federation for Information Processing, ⟨10.1007/978-0-387-73661-7_21⟩
Chapitre d'ouvrage hal-00191996v1

A Diversified Memory Built-In Self-Repair Approach for Nanotechnologies

 M. Nicolaidis , M.N. Achouri , Lorena Anghel
22nd IEEE VLSI Test Symposium, 2004, Napa Valley, United States. pp.313, ⟨10.1109/VTEST.2004.1299258⟩
Communication dans un congrès hal-00005750v1

Binary Bayesian Neural Networks for Efficient Uncertainty Estimation Leveraging Inherent Stochasticity of Spintronic Devices

 Soyed Tuhin , Kamal Danouchi , Christopher Münch , Guillaume Prenat , Lorena Anghel , et al.
17th ACM International Symposium on Nanoscale Architectures, Association for Computing machinery, Dec 2022, Virtual conference, United States. ⟨10.1145/3565478.3572536⟩
Communication dans un congrès hal-04054228v1

Embedded Tutorial: Hardware design and Reliability Mitigation of Binary Bayesian Reasoning Speakers: Lorena Anghel (Grenoble INP) and Mehdi Tahoori (KIT)

 Lorena Anghel , Mehdi Tahoori
IEEE VLSI Test Symposium, IEEE, Apr 2023, San Diego (CA), United States
Communication dans un congrès hal-04148196v1

Scalable Spintronics-based Bayesian Neural Network for Uncertainty Estimation

 Soyed Tuhin Ahmed , Kamal Danouchi , Michael Hefenbrock , Guillaume Prenat , Lorena Anghel , et al.
2023 Design, Automation & Test in Europe Conference & Exhibition (DATE), Apr 2023, Antwerp, Belgium. pp.1-6, ⟨10.23919/DATE56975.2023.10137167⟩
Communication dans un congrès hal-04148193v1

Worload Dependent Reliability Timing Analysis Flow

 A. Sivadasan , V. Huard , Lorena Anghel
DATE 2017, Mar 2017, Lausanne, Switzerland
Communication dans un congrès hal-01664169v1

Test and reliability in approximate computing

 Lorena Anghel , Mounir Benabdenbi , Alberto Bosio , Elena Ioana Vatajelu
IMSTW: International Mixed-Signal Testing Workshop, Jul 2017, Thessaloniki, Greece. ⟨10.1109/IMS3TW.2017.7995210⟩
Communication dans un congrès hal-01702768v1

Implementation and evaluation of a soft error detecting technique

 Lorena Anghel , M. Nicolaidis
The 5th IEEE International On-Line Testing Workshop (IOLTW'99), Jul 1999, Rhodes, Grèce
Communication dans un congrès hal-01357768v1

BIST for Logic and Local Interconnect Resources in a Novel Mesh of Cluster FPGA

 Saif-Ur Rehman , Mounir Benabdenbi , Lorena Anghel
IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), Oct 2013, New-York, United States. pp.296 - 301, ⟨10.1109/DFT.2013.6653622⟩
Communication dans un congrès hal-00982772v1

New Perspectives on Core In-field Path Delay Test

 Lorena Anghel , Riccardo Cantoro , D. Foti , Michele Portolan , S. Sartoni , et al.
International Test Conference (ITC 2020), Nov 2020, Washington DC, United States
Communication dans un congrès hal-03001829v1

Simulating single event transients in DVSM ICs for ground level radiation

 D. Alexandrescu , M. Nicolaidis , Lorena Anghel
3rd IEEE Latin American Test Workshop (LATW'02), Feb 2002, Montevideo, Uruguay
Communication dans un congrès hal-01380851v1

Editorial

 Lorena Anghel , Cristiana Bolchini , Salvatore Pontarelli
Elsevier, 38 (6), pp.565 - 566, 2014, Microprocessors and Microsystems, ⟨10.1016/j.micpro.2014.07.003⟩
Ouvrages hal-01920445v1

Exploring the state dependent SET sensitivity of asynchronous logic - The muller-pipeline example

 A. Steininger , V.S. Veeravalli , D. Alexandrescu , E. Costenaro , Lorena Anghel
32nd IEEE International Conference on Computer Design (ICCD'14), Oct 2014, Seoul, North Korea. pp.61-67
Communication dans un congrès hal-01400621v1

Improving DNN fault tolerance in semantic segmentation applications

 Stéphane Burel , Adrian Evans , Lorena Anghel
IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), Oct 2022, Austin, United States. pp.1-6, ⟨10.1109/DFT56152.2022.9962354⟩
Communication dans un congrès hal-03960998v1
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