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Laurent Fesquet

4
Documents

Présentation

Maître de conférences [Laboratoire TIMA](tima.imag.fr/ "Laboratoire TIMA") Equipe [CDSI](http://tima.imag.fr/tima/en/cdsi/cdsioverview.html "équipe CDSI") (Design of Integrated devices, Circuits and Systems)
Associate Professor [Laboratoire TIMA](tima.imag.fr/ "Laboratoire TIMA") Team: [CDSI](http://tima.imag.fr/tima/en/cdsi/cdsioverview.html "équipe CDSI") (Design of Integrated devices, Circuits and Systems)

Publications

835911

A Secure Programmable Architecture with a Dedicated Tech-mapping Algorithm: Application to a Crypto-Processor

T. Beyrouthy , Laurent Fesquet , Alin Razafindraibe , S. Chaudhuri , S. Guilley
23rd International Conference on Design of Circuits and Integrated Systems (DCIS'08), Nov 2008, Grenoble, France. pp.session 3b3
Communication dans un congrès hal-00346734v1

Secure Asynchronous FPGA for Embedded Systems (SAFE)

T. Beyrouthy , Alin Razafindraibe , Laurent Fesquet , Marc Renaudin
Colloque du GDR SoC-SiP, Jun 2007, Paris, France
Communication dans un congrès hal-00178955v1

A Reconfigurable Cell for a Multi-Style Asynchronous FPGA

Philippe Hoogvorst , Sylvain Guilley , Alin Razafindraibe , Taha Beyrouthy , Laurent Fesquet
RecoSoC: Reconfigurable Communication-centric Systems-on-Chip, Jun 2007, Montpellier, France. pp.15-22
Communication dans un congrès hal-00222887v1

Physical Design of FPGA Interconnect to Prevent Information Leakage

Sumanta Chaudhuri , Sylvain Guilley , Philippe Hoogvorst , Jean-Luc Danger , Taha Beyrouthy
Woods, R.; Compton, K.; Bourganis, C.; Diniz, P.C. Reconfigurable Computing: Architecture, Tools, and Applications, 4943, Springer, pp.87-98, 2008, Lecture Notes in Computer Science, ⟨10.1007/978-3-540-78610-8_11⟩
Chapitre d'ouvrage hal-00299487v1