- 28
- 1
Laurent Fesquet
29
Documents
Présentation
Maître de conférences
[Laboratoire TIMA](tima.imag.fr/ "Laboratoire TIMA")
Equipe [CDSI](http://tima.imag.fr/tima/en/cdsi/cdsioverview.html "équipe CDSI") (Design of Integrated devices, Circuits and Systems)
Associate Professor
[Laboratoire TIMA](tima.imag.fr/ "Laboratoire TIMA")
Team: [CDSI](http://tima.imag.fr/tima/en/cdsi/cdsioverview.html "équipe CDSI") (Design of Integrated devices, Circuits and Systems)
Publications
- 29
- 14
- 8
- 7
- 7
- 5
- 4
- 4
- 4
- 3
- 2
- 2
- 2
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 2
- 4
- 6
- 6
- 7
- 4
Body-Bias Micro-Generators for Activity-Driven Power ManagementFDSOI workshop at DATE Conference 2020, Mar 2020, Grenoble, France
Communication dans un congrès
hal-02956260v1
|
|
A Distributed Body-Biasing Strategy for Asynchronous Circuits27th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC 2019), Oct 2019, Cuzco, Peru
Communication dans un congrès
hal-02170157v1
|
|
Learning-Based Reliability Assessment Method for Detection of Permanent Faults in Clockless Circuits30th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF 2019), Aug 2019, Toulouse, France
Communication dans un congrès
hal-02165113v1
|
|
Exploring a Non-conventional Testing Technique for Asynchronous Circuits21èmes Journées Nationales du Réseau Doctoral en Microélectronique (JNRDM 2019), Jun 2019, Montpellier, France
Communication dans un congrès
hal-03100560v1
|
|
Level Shifter Architecture for Dynamically Biasing Ultra-Low Voltage Subcircuits of Integrated SystemsIEEE International Symposium on Circuits & Systems (ISCAS 2018), May 2018, Florence, Italy
Communication dans un congrès
hal-01726964v1
|
|
Fine Grain Body-Biasing: A strategy for asynchronous circuitsEuropean Nanoelectronics Applications, Design and Technology Conference (ADTC), Jun 2018, Grenoble, France
Communication dans un congrès
hal-01828009v1
|
|
A Non-Intrusive Testing Technique for Detection of Trojans in Asynchronous CircuitsDesign, Automation and Test in Europe (DATE 2018), Mar 2018, Dresden, Germany. pp.1516-1519
Communication dans un congrès
hal-01726979v1
|
|
A body built-in cell for detecting transient faults and dynamically biasing subcircuits of integrated systemsEuropean Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF'2018), Oct 2018, Aalborg, Denmark
Communication dans un congrès
hal-01986346v1
|
|
Fine Body Biasing Island Strategy in FD-SOI20th IP-SoC Conference (IP-SOC), Dec 2017, Grenoble, France
Communication dans un congrès
hal-01721571v1
|
|
A practical framework for specification, verification and design of self-timed pipelines 23rd IEEE International Symposium on Asynchronous Circuits and Systems (Async 2017), May 2017, San Diego, CA, United States. pp.65-72, ⟨10.1109/ASYNC.2017.16⟩
Communication dans un congrès
hal-01512247v1
|
|
Body Bias Control Cells based on Negative- and Positive-Level Shifter Architectures in Technology FD-SOI 28 nmJournées Nationales du Réseau Doctoral en Micro-nanoélectronique (JNRDM 2017), Nov 2017, Strasbourg, France
Communication dans un congrès
hal-01721072v1
|
|
Detection of Layout-Level Trojans by Injecting Current Into Substrate and Digitally Monitoring Built-In SensorsDesign Automation Conference, Jun 2017, Austin, TX, United States
Communication dans un congrès
hal-01627374v1
|
|
Detection of Layout-Level Trojans by Monitoring Substrate with Preexisting Built-in SensorsIEEE Computer Society Annual Symposium on VLSI (ISVLSI 2017), Jul 2017, Bochum, Germany. pp.290-295, ⟨10.1109/ISVLSI.2017.58⟩
Communication dans un congrès
hal-01627346v1
|
|
Analysis of granularity for automatic biasing control in FDSOI technology with low-voltage supplyJournées Nationales du Réseau Doctoral en Micro-Nanoélectronique (JNRDM'16), May 2016, Toulouse, France
Communication dans un congrès
hal-01524090v1
|
|
New asynchronous protocols for enhancing area and throughput in bundle-data pipelines29th Symposium on Integrated Circuits and Systems Design (SBCCI 2016), Aug 2016, Belo Horizonte, Brazil. pp.1-6, ⟨10.1109/SBCCI.2016.7724066⟩
Communication dans un congrès
hal-01345749v1
|
|
Comparison of Low-Voltage Scaling in Synchronous and Asynchronous FD-SOI Circuits26th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS'16), Sep 2016, Bremen, Germany
Communication dans un congrès
hal-01524087v1
|
|
High-level synthesis for event-based systemsSecond International Conference on Event-Based Control, Communications, and Signal Processing (EBCCSP 2016), Jun 2016, Krakow, Poland. pp.1-7, ⟨10.1109/EBCCSP.2016.7605252⟩
Communication dans un congrès
hal-01345745v1
|
|
AHLS_DESYNC: A Desynchronization Tool For High-Level Synthesis of Asynchronous CircuitsDesign, Automation and Test in Europe (DATE 2016), Mar 2016, Dresden, Germany
Communication dans un congrès
hal-01293842v1
|
|
QDI asynchronous circuits for low power applications: a comparative study in technology FD-SOI 28 nmJournées Nationales du Réseau Doctoral en Micro-Nanoélectronique (JNRDM'16), May 2016, Toulouse, France
Communication dans un congrès
hal-01524092v1
|
|
Simple Tri-State Logic Trojans Able to Upset Properties of Ring Oscillators11th International Conference on Design &Technology of Integrated Systems in Nanoscale Era (DTIS'16), Apr 2016, Istanbul, Turkey. pp.1-6, ⟨10.1109/DTIS.2016.7483811⟩
Communication dans un congrès
hal-01431177v1
|
|
A New Proposition on Hardware Trojan ActivationJournées Nationales du Réseau Doctoral en Micro-nanoélectronique (JNRDM'15), May 2015, Bordeaux, France
Communication dans un congrès
hal-01524097v1
|
|
Exploiting reliable features of asynchronous circuits for designing low-voltage components in FD-SOI technology26th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF'15), Oct 2015, Toulouse, France
Communication dans un congrès
hal-01393437v1
|
|
Flot de conception pour l'ultra-faible consommation : échantillonage non-uniforme et électronique asynchroneJournées Nationales du Réseau Doctoral en Micro-nanoélectronique (JNRDM'15), May 2015, Bordeaux, France
Communication dans un congrès
hal-01524095v1
|