Identifiants chercheur

  • IdHAL : kevin-martin
Nombre de documents

31

Kevin J. M. Martin


Maitre de conférences - Associate Professor

Université de Bretagne-Sud

Kevin Martin is an associate professor at the Université de Bretagne-Sud, France, in the team MOCS of the Lab-STICC.
He has received a M.S. in electrical and computer engineering in 2004 and a PhD in computer science in 2010 from the Université de Rennes, France.
His research interests include system-level design and methodologies, custom processors, embedded multi-processor platforms, high-level synthesis, computer-aided design for SoCs and embedded systems.


Article dans une revue3 documents

  • Thomas Biet, Kevin Martin, Jihane Hankache, Nora Hellou, Andreas Hauser, et al.. Triggering Emission with the Helical Turn in Thiadiazole-Helicenes. Chemistry - A European Journal, Wiley-VCH Verlag, 2017, 32, pp. 437-446. 〈10.1002/chem.201604471〉. 〈hal-01406346〉
  • Thanh Ngo, Kevin Martin, Jean-Philippe Diguet. Move Based Algorithm for Runtime Mapping of Dataflow Actors on Heterogeneous MPSoCs. Journal of Signal Processing Systems, Springer, 2015. 〈hal-01236673〉
  • Kevin Martin, Christophe Wolinski, Krzysztof Kuchcinski, Antoine Floch, François Charot. Constraint Programming Approach to Reconfigurable Processor Extension Generation and Application Compilation. ACM Transactions on Reconfigurable Technology and Systems (TRETS), ACM, 2012, 5 (2), pp.10:1--10:38. 〈http://doi.acm.org/10.1145/2209285.2209〉. 〈10.1145/2209285.2209289〉. 〈hal-00663464〉

Communication dans un congrès22 documents

  • Satyajit Das, Davide Rossi, Kevin Martin, Philippe Coussy, Luca Benini. A 142MOPS/mW Integrated Programmable Array accelerator for Smart Visual Processing. IEEE International Symposium on Circuits & Systems, May 2017, Baltimore, United States. 〈hal-01534574〉
  • Satyajit Das, Davide Rossi, Kevin Martin, Philippe Coussy, Luca Benini. Efficient Mapping of CDFG onto Coarse-Grained Reconfigurable Array Architectures. ASP-DAC, Jan 2017, Tokyo, Japan. 22nd Asia and South Pacific Design Automation Conference. 〈hal-01452277〉
  • Satyajit Das, Kevin Martin, Philippe Coussy, Thomas Peyret, Gwenolé Corre, et al.. A Scalable Design Approach to Efficiently Map Applications on CGRAs. IEEE Computer Society Annual Symposium on VLSI, Jul 2016, Pittsburgh, United States. Proceedings 2016 of the IEEE Computer Society Annual Symposium on VLSI. 〈hal-01347764〉
  • Kevin Martin, Mostafa Rizk, Martha Johanna Sepulveda Florez, Jean-Philippe Diguet. Notifying Memories: a case-study on Data-Flow Applications with NoC Interfaces Implementation. Design Automation Conference, Jun 2016, Austin, United States. 2016, Proceedings of the 53rd Annual Design Automation Conference. 〈10.1145/2897937.2898051〉. 〈hal-01347736〉
  • Satyajit Das, Kevin Martin, Thomas Peyret, Philippe Coussy. Introduction d'aléas dans le processus de projection d'applications sur CGRA. Conférence d’informatique en Parallélisme, Architecture et Système (COMPAS 2016), Jul 2016, Lorient, France. 〈http://compas2016.sciencesconf.org/〉. 〈hal-01347737〉
  • Yaset Oliva, Emmanuel Casseau, Kevin Martin, Jean-Philippe Diguet, Thanh Ngo, et al.. COMPA backend : Runtime dynamique pour l’exécution de programmes flot de données sur plates-formes multiprocesseurs. Conférence d’informatique en Parallélisme, Architecture et Système, Jul 2015, Lille, France. 2015. 〈hal-01167037〉
  • Paola Vallejo, Mickaël Kerboeuf, Kevin Martin, Jean-Philippe Babau. Improving Reuse by means of Asymmetrical Model Migrations: An Application to the Orcc Case Study. 2015 ACM/IEEE 18th International Conference on Model Driven Engineering Languages and Systems (MODELS), Sep 2015, Ottawa, Canada. 2015. 〈hal-01220427〉
  • Thanh Ngo, Sepulveda Daniel, Kevin Martin, Jean-Philippe Diguet. Communication-model based Embedded Mapping of Dataflow Actors on Heterogeneous MPSoC. Conference on Design and Architectures for Signal and Image Processing (DASIP), Oct 2014, Madrid, France. 2014. 〈hal-01075476〉
  • Pierre Bomel, Kevin Martin, Jean-Philippe Diguet. Virtual Devices for Hot-Pluggable Processors. 17th Euromicro Conference on Digital System Design (DSD), Aug 2014, Verona, Italy. 2014. 〈hal-01018908〉
  • Kevin Martin, Jean-Philippe Diguet, Emmanuel Casseau, Yaset Oliva. Dataflow program implementation onto a heterogeneous multiprocessor platform. METODO, Oct 2014, Madrid, France. 2014. 〈hal-01075481〉
  • Thomas Peyret, Gwenole Corre, Mathieu Thevenin, Kevin Martin, Philippe Coussy. Ordonnancement, assignation et transformations dynamiques de graphe simultanés pour projeter efficacement des applications sur CGRAs. Pascal Felber, Laurent Philippe, Etienne Riviere, Arnaud Tisserand. ComPAS 2014 : conférence en parallélisme, architecture et systèmes, Apr 2014, Neuchatel, Suisse. 〈hal-00985815〉
  • Thomas Peyret, Gwenolé Corre, Mathieu Thevenin, Kevin Martin, Philippe Coussy. An automated design approach to map applications on CGRAs. GLSVLSI Great Lakes Symposium on VLSI, May 2014, Houston, Texas, United States. ACM New York, NY, USA ©2014, pp.229-230, 2014, 〈10.1145/2591513.2591552〉. 〈hal-01002316〉
  • Thomas Peyret, Gwenole Corre, Mathieu Thevenin, Kevin Martin, Philippe Coussy. Efficient Application Mapping on CGRAs based on Backward Simultaneous Scheduling/Binding and Dynamic Graph Transformations. IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), Jun 2014, Switzerland. pp.XX, YY, 2014. 〈hal-01009486〉
  • Antoine Floch, Tomofumi Yuki, Ali El-Moussawi, Antoine Morvan, Kevin Martin, et al.. GeCoS: A framework for prototyping custom hardware design flows. Adams, Bram and Rilling, Juergen and Khomh, Foutse. 13th IEEE International Working Conference on Source Code Analysis and Manipulation (SCAM), Sep 2013, Eindhoven, Netherlands. IEEE, pp.100-105, 2013, 〈10.1109/SCAM.2013.6648190〉. 〈hal-00921370〉
  • Pierre Bomel, Kevin Martin, Jean-Philippe Diguet. Virtual UARTs for Reconfigurable Multi-processor Architectures. IEEE 27th International Symposium on Parallel and Distributed Processing, May 2013, United States. pp.Pages 252-259, 2013. 〈hal-00877367〉
  • Antoine Floch, François Charot, Steven Derrien, Kevin Martin, Antoine Morvan, et al.. Sélection d'instructions et ordonnancement parallèle simultanés pour la conception de processeurs spécialisés. Symposium en Architecture de Machines (Sympa'14), May 2011, St Malo, France. 2011. 〈hal-00640999〉
  • Christophe Wolinski, Krzysztof Kuchcinski, Kevin Martin, Antoine Floch, Erwan Raffin, et al.. Graph Constraints in Embedded System Design. Worshop on Combinatorial Optimization for Embedded System Design (COESD 2010), Jun 2010, Bologne, Italy. 2010. 〈inria-00481135〉
  • Kevin Martin, Christophe Wolinski, Krzysztof Kuchcinski, Antoine Floch, François Charot. Constraint-Driven Instructions Selection and Application Scheduling in the DURASE system. 20th IEEE International Conference on Application-specific Systems, Architectures and Processors, (ASAP 2009), Jul 2009, Boston, United States. pp.145-152, 2009, 〈10.1109/ASAP.2009.19〉. 〈inria-00449747〉
  • Kevin Martin, Christophe Wolinski, Krzysztof Kuchcinski, Antoine Floch, François Charot. Sélection automatique d'instructions et ordonnancement d'applications basés sur la programmation par contraintes. 13ème Symposium en Architecture de machines (SympA'13), Sep 2009, Toulouse, France. 2009. 〈inria-00449670〉
  • Christophe Wolinski, Krzysztof Kuchcinski, Kevin Martin, Erwan Raffin, François Charot. How Constraints Programming Can Help You in the Generation of Optimized Application Specific Reconfigurable Processor Extensions. International Conference on Engineering of Reconfigurable Systems & Algorithms (ERSA 2009), Jul 2009, Las Vegas, United States. 2009. 〈inria-00449775〉
  • Kevin Martin, Christophe Wolinski, Krzysztof Kuchcinski, Antoine Floch, François Charot. Constraint-Driven Identification of Application Specific Instructions in the DURASE System. 9th International Workshop on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS 2009), Jul 2009, Samos, Greece. Springer Berlin / Heidelberg, 5657, pp.194-203, 2009, Lecture Notes in Computer Science. 〈10.1007/978-3-642-03138-0_21〉. 〈inria-00449798〉
  • Christophe Wolinski, Krzysztof Kuchcinski, Kevin Martin, Erwan Raffin, François Charot. Design of Processor Accelerators with Constraints. 8th workshop of the Network for Sweden-based researchers and practitioners of Constraint programming, May 2009, Linköping, Sweden. 2009. 〈inria-00449820〉

Poster3 documents

  • Kevin Martin, Jean-Philippe Diguet, Yvan Eustache, Thanh Ngo, Emmanuel Casseau, et al.. Compa backend: a Dynamic Runtime for the execution of dataflow programs onto multi-core platforms. Conference on Design & Architectures for Signal & Image Processing, Demo Night, Sep 2015, Cracow, Poland. 2015. 〈hal-01220680〉
  • Yaset Oliva, Emmanuel Casseau, Kevin Martin, Pierre Bomel, Jean-Philippe Diguet, et al.. Orcc's Compa-Backend demonstration. Conference on Design and Architectures for Signal and Image Processing, Demo Night, Oct 2014, Madrid, Spain. 2014. 〈hal-01059858〉
  • Thanh Ngo, Kevin Martin, Jean-Philippe Diguet. Déploiement à la volée de réseaux d'acteurs dataflow dynamiques sur plateforme multiprocesseurs hétérogène. SoCSiP, Jun 2014, Paris, France. 2014. 〈hal-01078215〉

Brevet2 documents

  • Thomas Peyret, Thevenin Mathieu, Gwenole Corre, Philippe Coussy, Kevin Martin. Procédé et dispositif de tolérance aux fautes sur des composants électroniques. France, N° de brevet: FR1460633. 2015. 〈hal-01166874〉
  • Thomas Peyret, Thevenin Mathieu, Gwenole Corre, Kevin Martin, Philippe Coussy. Procédé et dispositif d'architecture configurable à gros grains pour exécuter l'intégralité d'un code. France, N° de brevet: FR1460631. 2015. 〈hal-01166875〉

Thèse1 document

  • Kevin Martin. Génération automatique d'extensions de jeux d'instructions de processeurs. Génie logiciel [cs.SE]. Université Rennes 1, 2010. Français. 〈tel-00526133〉