Filtrer vos résultats
- 65
- 8
- 57
- 9
- 4
- 1
- 1
- 1
- 1
- 63
- 11
- 3
- 6
- 5
- 4
- 2
- 3
- 5
- 2
- 3
- 3
- 6
- 3
- 5
- 5
- 4
- 8
- 3
- 1
- 1
- 1
- 68
- 5
- 71
- 4
- 4
- 3
- 3
- 3
- 2
- 1
- 1
- 1
- 1
- 1
- 73
- 36
- 29
- 11
- 6
- 6
- 4
- 4
- 4
- 4
- 4
- 4
- 4
- 4
- 3
- 3
- 3
- 3
- 3
- 3
- 3
- 3
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
73 résultats
Comparison of Synchronous and Asynchronous FIR Filter Architecture5th International Conference on Event-Based Control, Communication, and Signal Processing, May 2019, Vienna, Austria
Communication dans un congrès
hal-02157364v1
|
|||
Conclusively Verifying Clock-Domain Crossings in Very Large Hardware DesignsIFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC'16) , Sep 2016, Tallinn, Estonia. pp.1-6
Communication dans un congrès
hal-01375436v1
|
|||
Data-driven Pruning for Bundled-data Circuits28th International Symposium on Asynchronous Circuits and Systems (ASYNC 2023, Jul 2023, Beijing, China
Communication dans un congrès
hal-04331929v1
|
|||
|
|
Proving Parameterized Systems: the use of pseudo-pipelines in polyhedral logicCorrect Hardware Design and Verification Methods, springer, pp.376-379, 2005, 978-3-540-29105-3. ⟨10.1007/11560548_35⟩
Chapitre d'ouvrage
hal-00102816v1
|
||
Designing parallel programs and integrated circuitsInternational Mathematica Symposium (IMS'06), 2006, Avignon, France. 13 p
Communication dans un congrès
hal-00142674v1
|
|||
SyntHorus-2: Automatic Prototyping from PSLIFIP/IEEE International Conference On Very Large Scale Integration (VLSI-SoC'13), Oct 2013, Istanbul, Turkey. pp.75-80
Communication dans un congrès
hal-00919892v1
|
|||
A Generic CDC Modeling for Data Stability VerificationIEEE 30th International Conference on Electronics, Circuits and Systems (ICECS 2023), Dec 2023, Istanbul, Turkey
Communication dans un congrès
hal-04331999v1
|
|||
A Performance Comparison Between the SystemC-AMS Models of ComputationedaWorkshop, May 2011, Dresden, Germany. pp.13-18
Communication dans un congrès
hal-00652944v1
|
|||
On-line test vector generation from temporal regular expressionsIntensive Workshop on Service Oriented Computing (IWSOC'06), 2006, Le Caire, Egypt. pp.135—140
Communication dans un congrès
hal-00156359v1
|
|||
On-line test vector generation from temporal constraints written in PSLIFIP International Conference on Very Large Scale Integration (VLSI-SoC 2006), IFIP, 2006, Nice, France. pp.397-402
Communication dans un congrès
hal-00134450v1
|
|||
Synthesis of property monitors for online fault detectionJournal of Circuits, Systems, and Computers, 2007, 16 (6), pp.943 - 960. ⟨10.1142/S0218126607004088⟩
Article dans une revue
hal-00419356v1
|
|||
|
|
Verification of Control Properties in the Polyhedral Model[Research Report] RR-4756, INRIA. 2003
Rapport
inria-00071830v1
|
||
|
|
Arbitrary Reduced Precision for Fine-grained Accuracy and Energy Trade-offsMicroelectronics Reliability, 2021, ⟨10.1016/j.microrel.2021.114099⟩
Article dans une revue
hal-03332179v1
|
||
Validating Assertion Language Rewrite Rules and Semantics With Automated Theorem ProversIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2010, 29 (9), pp.1436 - 1448. ⟨10.1109/TCAD.2010.2049150⟩
Article dans une revue
hal-00518621v1
|
|||
Design Understanding with Fast Prototyping from AssertionsWorkshop on Design Automation for Understanding Hardware Designs (Friday Workshop DATE'14), Mar 2014, Dresden, Germany
Communication dans un congrès
hal-01060431v1
|
|||
Initiation à la conception de VLSI numériques10èmes journées pédagogiques CNFM, Nov 2008, Saint-Malo, France
Communication dans un congrès
hal-00385508v1
|
|||
On-line monitoring of properties built on regular expressionsForum on Specification and Design Languages (FDL'06), 2006, Darmstadt, Germany. pp.249-254
Communication dans un congrès
hal-00134431v1
|
|||
Synthesis of Quasi Delay Insensitive Monitors7th Conference on PhD Research in Microelectronics and Electronics (PRIME'11), Jul 2011, Madonna Di Campiglio (Trento), Italy. pp.225 - 228, ⟨10.1109/PRIME.2011.5966274⟩
Communication dans un congrès
hal-00646662v1
|
|||
Delay Insensitivity Does Not Mean Slope Insensitivity!IEEE Symposium on Asynchronous Circuits and Systems (ASYNC'10), May 2010, Grenoble, France. pp.176 - 184, ⟨10.1109/ASYNC.2010.27⟩
Communication dans un congrès
hal-00492923v1
|
|||
FPU Reduced Variable Precision in Time: Application to the Jacobi Iterative MethodIEEE Computer Society Annual Symposium on VLSI (ISVLSI 2021), Jul 2021, Tampa (FL), United States. ⟨10.1109/ISVLSI51109.2021.00040⟩
Communication dans un congrès
hal-03332203v1
|
|||
|
|
Improving the Efficiency of Formal Verification: The Case of Clock-Domain Crossings24th IFIP/IEEE International Conference on Very Large Scale Integration - System on a Chip (VLSISOC), Sep 2016, Tallinn, Estonia. pp.108-129, ⟨10.1007/978-3-319-67104-8_6⟩
Communication dans un congrès
hal-01675192v1
|
||
Contrôle autonome d'un nano-drone par caméra externeJournées pédagogiques du CNFM (JPCNFM), Nov 2014, Saint-Malo, France
Communication dans un congrès
hal-01166159v1
|
|||
Body-Bias Micro-Generators for Activity-Driven Power ManagementFDSOI workshop at DATE Conference 2020, Mar 2020, Grenoble, France
Communication dans un congrès
hal-02956260v1
|
|||
|
|
Un projet de microélectronique numérique original : Contrôle autonome d'un micro-drone par caméras externesJournal sur l'enseignement des sciences et technologies de l'information et des systèmes, 2015, 14 (2009), pp.9. ⟨10.1051/j3ea/2015021⟩
Article dans une revue
hal-01334687v1
|
||
High Level Fault Injection Method for Evaluating Critical System Parameter Ranges2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Nov 2020, Glasgow, United Kingdom. pp.1-4, ⟨10.1109/ICECS49266.2020.9294821⟩
Communication dans un congrès
hal-03136621v1
|
|||
On-line monitoring of properties built on regular expressions sequencesSorin A. Huss. Advances in Design and Specification Languages for Embedded Systems (Selected Contributions from FDL'06), Springer, pp.197-207, 2007, ISBN :978-1-4020-6147-9, ⟨10.1007/978-1-4020-6149-3_12⟩
Chapitre d'ouvrage
istex
hal-00229249v1
|
|||
Model of a Simple yet effective Operational AmplifierInternational Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD'12), Sep 2012, Seville, Spain. pp.165-168, ⟨10.1109/SMACD.2012.6339443⟩
Communication dans un congrès
hal-00746450v1
|
|||
|
|
Vérification Formelle dans le Modèle PolyédriqueRéseaux et télécommunications [cs.NI]. Université Rennes 1, 2004. Français. ⟨NNT : ⟩
Thèse
tel-00011522v1
|
||
Efficient and Correct by Construction Assertion-Based SynthesisIEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2015, PP (99), pp.1. ⟨10.1109/TVLSI.2014.2386212⟩
Article dans une revue
hal-01142595v1
|
|||
From High-Level Synthesis to Bundled-Data CircuitsInternational Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS 2020), Jul 2020, Samos, Greece
Communication dans un congrès
hal-02956234v1
|