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86 résultats
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VCU: The Three Dimensions of Reuse15th International Conference on Software Reuse (ICSR-15), May 2016, Limassol, Cyprus
Communication dans un congrès
hal-01287720v1
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Debugging and Verification Tools for LINGUA FRANCA in GEMOC StudioFDL 2021 - Forum on specification & Design Languages, Sep 2021, Antibes, France. ⟨10.1109/FDL53530.2021.9568383⟩
Communication dans un congrès
hal-03374955v1
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Early timing analysis based on scenario requirements and platform modelsSoftware and Systems Modeling, 2022, 21, ⟨10.1007/s10270-022-01002-3⟩
Article dans une revue
hal-03375049v1
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Tool Support for the Analysis of TADL2 Timing Constraints using TimeSquareICECCS'2013 - 18th International Conference on Engineering of Complex Computer Systems, Jul 2013, Singapore, Singapore
Communication dans un congrès
hal-00850673v1
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Logical time at work: capturing data dependencies and platform constraintsForum for Design Languages (FDL), Electronic Chips & Systems design Initiative (ECSI), Sep 2010, Southampton, United Kingdom. pp.240-246
Communication dans un congrès
inria-00545866v1
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GEMOC 2014 2nd International Workshop on The Globalization of Modeling LanguagesBenoit Combemale; Julien Deantoni; Robert France. GEMOC 2014 co-located with MODELS 2014, Sep 2014, Valencia, France. 1236, , pp.82, 2014, CEUR-WS, 1613-0073
Proceedings/Recueil des communications
hal-01074602v1
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SAIA : Sensors/Actuators Independent Architecture -- A showcase through the Martian Task Specifications2005
Autre publication scientifique
inria-00587210v1
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Joint Proceedings of the 3rd International Workshop on the Globalization Of Modeling Languages and the 9th International Workshop on Multi-Paradigm ModelingGEMOC+MPM 2015, Ottawa, Canada. 1511, CEUR, 2015, Joint Proceedings of the 3rd International Workshop on the Globalization Of Modeling Languages and the 9th International Workshop on Multi-Paradigm Modeling
Proceedings/Recueil des communications
hal-01242558v1
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A MDA Approach for Systems Dedicated to Process ControlProceedings of the 11th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, Aug 2005, hong kong, China. pp.567--570, ⟨10.1109/RTCSA.2005.11⟩
Communication dans un congrès
inria-00587341v1
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Schedulability analysis by exhaustive state space construction: translating CCSL to transition-based Generalized Buchi Automata[Research Report] RR-8102, 2012, pp.22
Rapport
hal-00743874v1
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Executing AADL models with UML/MarteInt. Conf. Engineering of Complex Computer Systems - ICECCS'09, Jun 2009, Potsdam, Germany. pp. 371-376, ⟨10.1109/ICECCS.2009.10⟩
Communication dans un congrès
inria-00416592v1
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Time in SCChartsForum on specification & Design Languages, Sep 2018, Munich, Germany. pp.5-16, ⟨10.1109/FDL.2018.8524111⟩
Communication dans un congrès
hal-01898285v1
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A Unifying Framework for Homogeneous Model CompositionSoftware and Systems Modeling, 2019, pp.1-19. ⟨10.1007/s10270-018-00707-8⟩
Article dans une revue
hal-01949050v1
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Multi-View Power Modeling based on UML, MARTE and SysMLSEAA - 38th Euromicro Conference on Software Engineering and Advanced Applications, Sep 2012, Cesme, Turkey. pp.17-20, ⟨10.1109/SEAA.2012.66⟩
Communication dans un congrès
hal-00720735v1
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Weaving Concurrency in eXecutable Domain-Specific Modeling Languages8th ACM SIGPLAN International Conference on Software Language Engineering (SLE), 2015, Pittsburg, United States
Communication dans un congrès
hal-01185911v1
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Towards Sketching Interfaces for Multi-Paradigm ModelingMPM4CPS - First International Workshop on Multi-Paradigm Modelling for Cyber-Physical Systems, Sep 2019, Munich, Germany
Communication dans un congrès
hal-02336809v1
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Examining model qualities and their impact on digital twinsANNSIM 2023 - Annual Modeling and Simulation Conference, May 2023, Hamilton, Ontario, Canada. pp.220-232
Communication dans un congrès
hal-04259726v1
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Execution Framework of the GEMOC Studio (Tool Demo)Proceedings of the 2016 ACM SIGPLAN International Conference on Software Language Engineering, Oct 2016, Amsterdam, Netherlands. pp.8
Communication dans un congrès
hal-01355391v2
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A Behavioral Coordination Operator Language (BCOoL)International Conference on Model Driven Engineering Languages and Systems (MODELS), Sep 2015, Ottawa, Canada. pp.462
Communication dans un congrès
hal-01182773v1
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Model driven engineering method for SAIA architecture designIngénierie Dirigée par les Modèles, Jun 2006, Lille, France
Communication dans un congrès
inria-00587200v1
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UML MARTE Time Model and Its Clock Constraint Specification LanguageAlessandra Bagnato; Leandro Soares Indrusiak; Imran Rafiq Quadri; Matteo Rossi. Embedded Systems Design, IGI Global, 2014, Handbook of Research on, 9781466661943. ⟨10.4018/978-1-4666-6194-3.ch002⟩
Chapitre d'ouvrage
hal-01079039v1
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CCSL denotational semantics[Research Report] RR-8628, Inria. 2014, pp.29
Rapport
hal-01082274v1
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Explicit Control of Dataflow Graphs with MARTE/CCSLMODELSWARD 2017 - 5th International Conference on Model-Driven Engineering and Software Development, MODELSWARD 2017, Feb 2017, Porto, Portugal. pp.542-549, ⟨10.5220/0006269505420549⟩
Communication dans un congrès
hal-01644294v1
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Execution of Heterogeneous Models for Thermal Analysis with a Multi-view ApproachFDL 2014 : Forum on specification and Design Languages, Oct 2014, Munich, Germany
Communication dans un congrès
hal-01060309v1
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CoSim20: An Integrated Development Environment for Accurate and Efficient Distributed Co-SimulationsICISE 2020 - 5th International Conference on Information Systems Engineering, Nov 2020, Manchester / Virtual, United Kingdom
Communication dans un congrès
hal-03038547v1
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The Time Model of Logical Clocks available in the OMG MARTE profileSandeep K. Shukla and Jean-Pierre Talpin. Synthesis of Embedded Software: Frameworks and Methodologies for Correctness by Construction, Springer Science+Business Media, LLC 2010, pp.28, 2010, 978-1-4419-6399-4
Chapitre d'ouvrage
inria-00495664v1
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Time in SCChartsLanguage, Design Methods, and Tools for Electronic System Design, Springer, pp.1-25, 2019, ⟨10.1007/978-3-030-31585-6_1⟩
Chapitre d'ouvrage
hal-02434885v1
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Progressive and explicit refinement of scheduling for multidimensional data-flow applications using uml marteDesign Automation for Embedded Systems, 2012, 16 (2), pp.137-169. ⟨10.1007/s10617-012-9093-y⟩
Article dans une revue
istex
hal-00727239v1
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Toward a TLM to RTL refinement : a formal approach3rd Junior Researcher Workshop on Real-Time Computing (JRWRTC 2009), Oct 2009, Paris, France
Communication dans un congrès
inria-00494224v1
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A timing model for specifying multi clock automotive systems. The Timing Augmented Description Language V2ICECCS 2012 - 17th International Conference on Engineering of Complex Computer Systems, Jul 2012, Paris, France. pp.230-239
Communication dans un congrès
hal-00687562v1
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