Nombre de documents

16


Article dans une revue3 documents

  • Maxime Pelcat, Alexandre Mercat, Karol Desnos, Luca Maggiani, Yanzhou Liu, et al.. Reproducible Evaluation of System Efficiency with a Model of Architecture: From Theory to Practice. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE, 2018, 37 (10), pp.2050 - 2063. 〈10.1109/TCAD.2017.2774822〉. 〈hal-01646738〉
  • Erwan Nogues, Julien Heulot, Glenn Herrou, Ladislas Robin, Maxime Pelcat, et al.. Efficient DVFS for low power HEVC software decoder. Journal of Real-Time Image Processing, Springer Verlag, 2017, 13 (1), pp.39-54. 〈10.1007/s11554-016-0624-9〉. 〈hal-01354629〉
  • Carlo Sau, Francesca Palumbo, Maxime Pelcat, Julien Heulot, Erwan Nogues, et al.. Challenging the Best HEVC Fractional Pixel FPGA Interpolators With Reconfigurable and Multifrequency Approximate Computing. IEEE Embedded Systems Letters, Institute of Electrical and Electronics Engineers, 2017, 9 (3), pp.65 - 68. 〈10.1109/LES.2017.2703585〉. 〈hal-01667826〉

Communication dans un congrès10 documents

  • Florian Arrestier, Karol Desnos, Maxime Pelcat, Julien Heulot, Eduardo Juarez, et al.. Delays and States in Dataflow Models of Computation. SAMOS XVIII, Jul 2018, Pythagorion, Greece. 〈10.1145/3229631.3229645〉. 〈hal-01850252〉
  • Naty Sidaty, Julien Heulot, Wassim Hamidouche, Maxime Pelcat, Daniel Menard. Reducing Computational Complexity in HEVC Decoder for Mobile Energy Saving. European Signal Processing Conference (EUSIPCO 2017) , Aug 2017, Nos Island, Greece. 2017. 〈hal-01580542〉
  • Maxime Pelcat, Karol Desnos, Luca Maggiani, Yanzhou Liu, Julien Heulot, et al.. Models of Architecture: Reproducible Efficiency Evaluation for Signal Processing Systems. International Workshop on Signal Processing Systems, Oct 2016, Dallas, United States. 2016, Proceedings of the 2016 IEEE International Workshop on Signal Processing Systems. 〈hal-01390508〉
  • Karol Desnos, Julien Heulot. PiSDF: Parameterized & Interfaced Synchronous Dataflow for MPSoCs Runtime Reconfiguration. 1st Workshop on MEthods and TOols for Dataflow PrOgramming (METODO), Oct 2014, Madrid, Spain. 1st Workshop on MEthods and TOols for Dataflow PrOgramming (METODO), proceedings, 2014. 〈hal-01075114〉
  • Julien Heulot, Judicaël Menant, Maxime Pelcat, Jean-François Nezan, Luce Morin, et al.. Demonstrating a Dataflow-based RTOS for Heterogeneous MPSoC by means of a Stereo Matching Application. DASIP 2014, Oct 2014, Madrid, Spain. 〈hal-01101788〉
  • Julien Heulot, Maxime Pelcat, Jean-François Nezan, Yaset Oliva, Slaheddine Aridhi, et al.. Just-In-Time Scheduling Techniques for Multicore Signal Processing Systems. GlobalSIP14, Dec 2014, Atlanta, United States. 〈hal-01101790〉
  • Maxime Pelcat, Karol Desnos, Julien Heulot, Clément Guy, Jean François Nezan, et al.. PREESM: A Dataflow-Based Rapid Prototyping Framework for Simplifying Multicore DSP Programming. EDERC, Sep 2014, Italy. pp.36, 2014. 〈hal-01059313〉
  • Julien Heulot, Maxime Pelcat, Karol Desnos, Jean François Nezan, Slaheddine Aridhi. SPIDER: A Synchronous Parameterized and Interfaced Dataflow-Based RTOS for Multicore DSPs. EDERC, Sep 2014, Milan, Italy. pp.167, 2014. 〈hal-01067052〉
  • Julien Heulot, Jani Boutellier, Maxime Pelcat, Jean François Nezan, Slaheddine Aridhi. Applying the Adaptive Hybrid Flow-Shop Scheduling Method to Schedule a 3GPP LTE Physical Layer Algorithm onto Many-Core Digital Signal Processors. NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2013), Jun 2013, Turino, Italy. pp.Pages 123 - 129, 2013. 〈hal-00877643v2〉
  • Julien Heulot, Karol Desnos, Jean François Nezan, Maxime Pelcat, Mickaël Raulet, et al.. AN EXPERIMENTAL TOOLCHAIN BASED ON HIGH-LEVEL DATAFLOW MODELS OF COMPUTATION FOR HETEROGENEOUS MPSOC. DASIP, Oct 2012, Karlsruhe, Germany. 2012. 〈hal-00749175〉

Rapport2 documents

  • Maxime Pelcat, Alexandre Mercat, Karol Desnos, Luca Maggiani, Yanzhou Liu, et al.. Models of Architecture: Application to ESL Model-Based Energy Consumption Estimation. [Research Report] IETR/INSA Rennes; Scuola Superiore Sant’Anna, Pisa; Institut Pascal; University of Maryland, College Park; Tampere University of Technology, Tampere. 2017. 〈hal-01464856〉
  • Maxime Pelcat, Karol Desnos, Luca Maggiani, Yanzhou Liu, Julien Heulot, et al.. Models of Architecture. [Research Report] PREESM/2015-12TR01, 2015, IETR/INSA Rennes; Scuola Superiore Sant’Anna, Pisa; Institut Pascal, Clermont Ferrand; University of Maryland, College Park; Tampere University of Technology, Tampere. 2015. 〈hal-01244470〉

Thèse1 document

  • Julien Heulot. Runtime multicore scheduling techniques for dispatching parameterized signal and vision dataflow applications on heterogeneous MPSoCs. Signal and Image processing. INSA de Rennes, 2015. English. 〈NNT : 2015ISAR0023〉. 〈tel-01301642〉