Jérémy Postel-Pellerin

Documents

Publications

	Correlation between 1064 nm laser attack and thermal behavior in STT-MRAM Nicole Yazigy , J. Postel-Pellerin , G. Di Pendina , R.C. Sousa , V. Della Marca Microelectronics Reliability, 2023, 150, pp.115167. ⟨10.1016/j.microrel.2023.115167⟩ Article dans une revue hal-04524638v1
	Experimental analysis on stochastic behavior of preswitching time in STT-MRAM N. Yazigy , J. Postel-Pellerin , V. Della Marca , K. Terziyan , S. Nadifi Microelectronics Reliability, 2022, 138, pp.114677. ⟨10.1016/j.microrel.2022.114677⟩ Article dans une revue hal-03941025v1
	STATE: A Test Structure for Rapid and Reliable Prediction of Resistive RAM Endurance H. Aziza , J. Postel-Pellerin , M. Moreau IEEE Transactions on Device and Materials Reliability, 2022, 22 (4), pp.500-505. ⟨10.1109/TDMR.2022.3213191⟩ Article dans une revue hal-03941082v1
	Experimental Analysis of Oxide-Based RAM Analog Synaptic Behavior Hassan Aziza , Jeremy Postel-Pellerin , Mathieu Moreau Electronics, 2022, 12 (1), pp.49. ⟨10.3390/electronics12010049⟩ Article dans une revue hal-03941057v1
	1T-NOR Flash memory after endurance degradation: An advanced TCAD simulation F. Matteo , R. Simola , J. Postel-Pellerin , K. Coulié Microelectronics Reliability, 2022, 138, pp.114621. ⟨10.1016/j.microrel.2022.114621⟩ Article dans une revue hal-03941091v1
	EEPROM endurance degradation at different temperatures: State of the art TCAD simulation Franck Matteo , Karine Coulié , Roberto Simola , Jérémy Postel-Pellerin , Franck Melul Microelectronics Reliability, 2022, 136, pp.114717. ⟨10.1016/j.microrel.2022.114717⟩ Article dans une revue hal-03941108v1
	Real-time switching dynamics in STT-MRAM N Yazigy , J Postel-Pellerin , V Della Marca , K Terziyan , R C Sousa IEEE Journal of the Electron Devices Society, 2022, ⟨10.1109/jeds.2022.3185324⟩ Article dans une revue hal-03708265v1
	True Random Number Generator Integration in a Resistive RAM Memory Array Using Input Current Limitation Hassen Aziza , Jeremy Postel-Pellerin , Hussein Bazzi , Pierre Canet , Mathieu Moreau IEEE Transactions on Nanotechnology, 2020, 19, pp.214-222. ⟨10.1109/TNANO.2020.2976735⟩ Article dans une revue hal-03504843v1
	A global modeling approach of the leakage phenomena in dielectrics Jérémy Postel-Pellerin , Gilles Micolau , Philippe Chiquet , Maminirina Joelson , Jean-Baptiste Decitre E3S Web of Conferences, 2019, 88, pp.05002. ⟨10.1051/e3sconf/20198805002⟩ Article dans une revue hal-02618292v1
	Phenomenological modelling of non-volatile memory threshold voltage shift induced by nonlinear ionization with a femtosecond laser Philippe Chiquet , Maxime Chambonneau , V. Della Marca , Jérémy Postel-Pellerin , Pierre Canet Scientific Reports, 2019, 9 (7392), ⟨10.1038/s41598-019-43344-x⟩ Article dans une revue hal-02137915v1
	Quantitative correlation between Flash and equivalent transistor for endurance electrical parameters extraction V. Della Marca , J. Postel-Pellerin , T. Kempf , A. Regnier , P. Chiquet Microelectronics Reliability, 2018, 88-90, pp.159 - 163. ⟨10.1016/j.microrel.2018.06.116⟩ Article dans une revue hal-01900789v1
	Impact of Line Resistance Combined with Device Variability on Resistive RAM Memories Hassen Aziza , Pierre Canet , Jérémy Postel-Pellerin Advances in Science, Technology and Engineering Systems Journal, 2018, 3 (1), pp.11-17. ⟨10.25046/aj030102⟩ Article dans une revue hal-02335339v1
	Suppressing the memory state of floating gate transistors with repeated femtosecond laser backside irradiations Maxime Chambonneau , Sarra Souiki Souiki-Figuigui , Philippe Chiquet , Vincenzo Della Marca , Jérémy Postel-Pellerin Applied Physics Letters, 2017, 110, pp.161112 - 161112 Article dans une revue hal-01655116v1
	Impact of resistive paths on NVM array reliability: Application to Flash & ReRAM memories P. Canet , J. Postel-Pellerin , Hassen Aziza Microelectronics Reliability, 2016, 64 (SI), pp.36-41. ⟨10.1016/j.microrel.2016.07.096⟩ Article dans une revue hal-01434941v1
	Enhancement of flash memory endurance using short pulsed program/erase signals P. Chiquet , J. Postel-Pellerin , C. Tuninetti , S. Souiki-Figuigui , P. Masson ACTA IMEKO, 2016, 5 (4), pp.29-36. ⟨10.21014/acta_imeko.v5i4.422⟩ Article dans une revue hal-01451431v1
	Impact of endurance degradation on the programming efficiency and the energy consumption of NOR flash memories V. Della Marca , J. Postel-Pellerin , G. Just , P. Canet , J.-L. Ogier Microelectronics Reliability, 2014, 54 (9-10), pp.2262 - 2265. ⟨10.1016/j.microrel.2014.07.063⟩ Article dans une revue hal-01760459v1
	Experimental setup for non-destructive measurement of tunneling currents in semiconductor devices Philippe Chiquet , Pascal Masson , Jérémy Postel-Pellerin , Romain Laffont , Gilles Micolau Measurement - Journal of the International Measurement Confederation (IMEKO), 2014, 54, pp.234-240. ⟨10.1016/j.measurement.2014.02.015⟩ Article dans une revue hal-01315418v1
	Improved Performance of Silicon Nanocrystal Memories for Application Working Over a Wide Range of Temperature V. Della Marca , J. Amouroux , G. Molas , J. Postel-Pellerin , F. Lalande ECS Transactions, 2013, 53 (4), pp.129 - 139. ⟨10.1149/05304.0129ecst⟩ Article dans une revue hal-01760473v1
	Push the flash floating gate memories toward the future low energy application V. Della Marca , G. Just , A. Regnier , L. Ogier , R. Simola Solid-State Electronics, 2013, 79, pp.210 - 217. ⟨10.1016/j.sse.2012.09.001⟩ Article dans une revue hal-01760461v1
	Effects of Lightly Doped Drain and Channel Doping Variations on Flash Memory Performances and Reliability Guillaume Just , V. Della Marca , Arnaud Regnier , Jean-Luc Ogier , Jérémy Postel-Pellerin Journal of Low Power Electronics, 2012, 8 (5), pp.717 - 724. ⟨10.1166/jolpe.2012.1230⟩ Article dans une revue hal-01760474v1

	Analysis of Conductance Variability in RRAM for Accurate Neuromorphic Computing Hassen Aziza , J. Postel-Pellerin , Moritz Fieback , Said Hamdioui , Hanzhi Xun 25th IEEE Latin-American Test Symposium, Apr 2024, Maceio, Brazil Communication dans un congrès hal-04540709v1
	Advanced TCAD Simulation of Tunnel Oxide Degradation for EEPROM Applications F. Matteo , R. Simola , J. Postel-Pellerin , K. Coulie IEEE 4th International Conference on Dielectrics (ICD 2022), Jul 2022, Palerme, Italy. pp.764-768, ⟨10.1109/ICD53806.2022.9863611⟩ Communication dans un congrès hal-03941192v1
	STATE: A Test Structure for Rapid Prediction of Resistive RAM Electrical Parameter Variability Hassen Aziza , Jeremy Postel-Pellerin , Hussein Bazzi , Mathieu Moreau , Adnan Harb IEEE International Symposium on Circuits and Systems (ISCAS) 2022, May 2022, Austin, United States. pp.3532-3536, ⟨10.1109/ISCAS48785.2022.9937716⟩ Communication dans un congrès hal-03941188v1
	Experimental analysis on stochastic behavior of preswitching time in STT-MRAM N. Yazigy , J. Postel-Pellerin , V. Della Marca , K. Terziyan , S. Nadifi European Symposium on Reliability of Electron Devices, Failure Physics and Analysis, Sep 2022, Berlin, Germany. ⟨10.1016/j.microrel.2022.114677⟩ Communication dans un congrès hal-03941219v1
	1T-NOR Flash memory after endurance degradation: An advanced TCAD simulation F. Matteo , R. Simola , J. Postel-Pellerin , K. Coulié European Symposium on Reliability of Electron Devices, Failure Physics and Analysis, Sep 2022, Berlin, Germany. pp.114621, ⟨10.1016/j.microrel.2022.114621⟩ Communication dans un congrès hal-03941212v1
	Resistive RAM SET and RESET Switching Voltage Evaluation as an Entropy Source for Random Number Generation Hussein Bazzi , Jeremy Postel-Pellerin , Hassen Aziza , Mathieu Moreau , Adnan Harb 2020 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), Oct 2020, Frascati, Italy. pp.1-4, ⟨10.1109/DFT50435.2020.9250726⟩ Communication dans un congrès hal-03504288v1
	An Augmented OxRAM Synapse for Spiking Neural Network (SNN) Circuits Hassen Aziza , H. Bazzi , J. Postel-Pellerin , P. Canet , M. Moreau 2019 14th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS), Apr 2019, Mykonos, France. ⟨10.1109/DTIS.2019.8735057⟩ Communication dans un congrès hal-02306907v1
	True random number generation exploiting SET voltage variability in resistive RAM memory arrays Jérémy Postel-Pellerin , Hussein Bazzi , Hassen Aziza , Pierre Canet , Mathieu Moreau 2019 19th Non-Volatile Memory Technology Symposium (NVMTS), Oct 2019, Durham, France. pp.1-5, ⟨10.1109/NVMTS47818.2019.9043369⟩ Communication dans un congrès hal-03504849v1
	MRAM: from STT to SOT, for security and memory M. Kharbouche-Harrari , Rana Alhalabi , J. Postel-Pellerin , Romain Wacquez , Driss Aboulkassimi XXXIII CONFERENCE ON DESIGN OF CIRCUITS AND INTEGRATED SYSTEMS (DCIS), Nov 2018, Lyon, France Communication dans un congrès hal-01982788v1
	Impact of a laser pulse on a STT-MRAM bitcell: security and reliability issues M. Kharbouche-Harrari , J. Postel-Pellerin , G. Di Pendina , R. Wacquez , D. Aboulkassimi 2018 IEEE 24th International Symposium on On-Line Testing And Robust System Design (IOLTS), Jul 2018, Platja d'Aro, Spain. pp.243-244, ⟨10.1109/IOLTS.2018.8474088⟩ Communication dans un congrès hal-01976697v1
	ReRAM ON/OFF resistance ratio degradation due to line resistance combined with device variability in 28nm FDSOI technology Hassen Aziza , P. Canet , J. Postel-Pellerin , Mathieu Moreau , Jean-Michel Portal 2017 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), Apr 2017, Athens, Greece. ⟨10.1109/ULIS.2017.7962594⟩ Communication dans un congrès hal-01745666v1
	Effect Of Short Pulsed Program/Erase Cycling On Flash Memory Devices P. Chiquet , J. Postel-Pellerin , C. Tuninetti , S. Souiki-Figuigui , P. Masson Workshop on New Perspectives in Measurements, Tools and Techniques for system’s reliability, maintainability and safety, Jun 2016, Milan, Italy Communication dans un congrès hal-01437034v1
	Electromagnetic Analysis Perturbation using Chaos Generator Thomas Sarno , Romain Wacquez , Edith Kussener , Philippe Maurine , Khalil Jradi Truedevice 2016, Nov 2016, Barcelona, Spain Communication dans un congrès hal-01455446v1
	NVM cell degradation induced by femtosecond laser backside irradiation for reliability tests V. Della Marca , M. Chambonneau , S. Souiki-Figuigui , J. Postel-Pellerin , P. Canet 2016 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS), 2016, Pasadena, United States. ⟨10.1109/IRPS.2016.7574580⟩ Communication dans un congrès hal-01418479v1
	Simulation of the programming efficiency and the energy consumption of Flash memories during endurance degradation J. Postel-Pellerin , P. Chiquet , V. Della Marca International Semiconductor Conference (CAS), 2016, Oct 2016, Sinaia, Romania. ⟨10.1109/SMICND.2016.7783052⟩ Communication dans un congrès hal-01436469v1
	Indirect measurement of low tunneling currents through dielectrics using floating gate structures J. Postel-Pellerin , P. Chiquet , Gilles Micolau , D. Boyer IEEE International Conference on Dielectrics (ICD), Jul 2016, Montpellier, France. pp.1065-1068 Communication dans un congrès hal-01594071v1
	Impact of Resistive Paths on NVM Array Reliability: Application to Flash & ReRAM Memories P. Canet , J. Postel-Pellerin , Hassen Aziza 27th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF 2016), Sep 2016, Halle, Germany Communication dans un congrès hal-01463140v1
	Toward an innovative stochastic modeling of electric charges losses trough dielectrics G. Micolau , J. Postel-Pellerin , P. Chiquet , M. Joelson , C. Abbas Inter-Disciplinary Underground Science and Technology (i-DUST) Conference, Jun 2016, Avignon, France. pp.9, ⟨10.1051/e3sconf/20161204004⟩ Communication dans un congrès hal-01451874v1
	Optimization of the ATW Non-Volatile Memory for Connected Smart Objects Jonathan Bartoli , V. Della Marca , Jérémy Postel-Pellerin , Julien Delalleau , Arnaud Regnier 2015 IEEE International Memory Workshop (IMW), May 2015, Monterey, France. ⟨10.1109/IMW.2015.7150299⟩ Communication dans un congrès hal-01760536v1
	Advanced experimental setup for reliability and current consumption measurements of Flash non-volatile memories V. Della Marca , T. Wakrim , J. Postel-Pellerin , P. Canet IMEKO TC4, Sep 2014, Benevento, Italy Communication dans un congrès hal-01760548v1
	A new non-volatile memory cell based on the flash architecture for embedded low energy applications: ATW (Asymmetrical Tunnel Window) J. Bartoli , V. Della Marca , J. Delalleau , A. Regnier , S. Niel 2014 International Semiconductor Conference (CAS), Oct 2014, Sinaia, France. ⟨10.1109/SMICND.2014.6966409⟩ Communication dans un congrès hal-01760564v1
	Improving Flash memory endurance and consumption with ultra-short channel-hot-electron programming pulses J. Postel-Pellerin , P. Chiquet , V. Della Marca , T. Wakrim , G. Just 2014 International Semiconductor Conference (CAS), Oct 2014, Sinaia, France. ⟨10.1109/SMICND.2014.6966433⟩ Communication dans un congrès hal-01760566v1
	Dynamic behavior of silicon nanocrystal memories during the hot carrier injection V. Della Marca , L. Masoero , J. Postel-Pellerin , F. Lalande , J. Amouroux IEEE International Conference on Solid Dielectrics (ICSD 2013), Jun 2013, Bologne, Italy. ⟨10.1109/ICSD.2013.6619820⟩ Communication dans un congrès hal-01760571v1
	Determination of physical properties of semiconductor-oxide-semiconductor structures using a new fast gate current measurement protocol. P. Chiquet , P. Masson , Gilles Micolau , R. Laffont , F. Lalande 11th IEEE International Conference on Solid Dielectrics , Jul 2013, Bologne, Italy Communication dans un congrès hal-01315415v1
	How to improve the silicon nanocrystal memory cell performances for low power applications V. Della Marca , J. Amouroux , G. Molas , J. Postel-Pellerin , F. Lalande 2012 International Semiconductor Conference (CAS 2012), Oct 2012, Sinaia, Romania. ⟨10.1109/SMICND.2012.6400686⟩ Communication dans un congrès hal-01760587v1
	Optimization of programming consumption of silicon nanocrystal memories for low power applications V. Della Marca , L. Masoero , G. Molas , J. Amouroux , E. Petit-Faivre 2012 International Semiconductor Conference Dresden-Grenoble (ISCDG) - formerly known as the Semiconductor Conference Dresden (SCD), Sep 2012, Grenoble, France. ⟨10.1109/ISCDG.2012.6359988⟩ Communication dans un congrès hal-01760573v1
	Energy consumption optimization in nonvolatile silicon nanocrystal memories V. Della Marca , Julien Amouroux , Julien Delalleau , Laurent Lopez , Jean-Luc Ogier 2011 International Semiconductor Conference (CAS 2011), Oct 2011, Sinaia, France. ⟨10.1109/SMICND.2011.6095810⟩ Communication dans un congrès hal-01760593v1
	Experimental study to push the Flash floating gate memories toward low energy applications V. Della Marca , A. Regnier , J. Ogier , R. Simola , S. Niel 2011 International Semiconductor Device Research Symposium (ISDRS), Dec 2011, College Park, France. pp.73 - 77, ⟨10.1109/ISDRS.2011.6135271⟩ Communication dans un congrès hal-01760595v1

	Programming optimization for low energy NOR Flash memories V. Della Marca , J. Postel-Pellerin , G. Just , P. Canet , J.-L. Ogier Non-Volatile Memory Workshop, Mar 2015, San Diego, United States Poster de conférence hal-01760653v1
	A new flash architecture for embedded low energy applications: ATW (Asymmetrical Tunnel Window) J. Bartoli , V. Della Marca , Julien Delalleau , Arnaud Regnier , S. Niel Non-Volatile Memory Workshop, Mar 2014, San Diego, United States Poster de conférence hal-01760651v1

	Fiabilité des Mémoires Non-Volatiles de type Flash en architectures NOR et NAND Jérémy Postel-Pellerin Micro et nanotechnologies/Microélectronique. Université de Provence - Aix-Marseille I, 2008. Français. ⟨NNT : ⟩ Thèse tel-00370377v1

Jérémy Postel-Pellerin

Publications

Correlation between 1064 nm laser attack and thermal behavior in STT-MRAM

Experimental analysis on stochastic behavior of preswitching time in STT-MRAM

STATE: A Test Structure for Rapid and Reliable Prediction of Resistive RAM Endurance

Experimental Analysis of Oxide-Based RAM Analog Synaptic Behavior

1T-NOR Flash memory after endurance degradation: An advanced TCAD simulation

EEPROM endurance degradation at different temperatures: State of the art TCAD simulation

Real-time switching dynamics in STT-MRAM

True Random Number Generator Integration in a Resistive RAM Memory Array Using Input Current Limitation

A global modeling approach of the leakage phenomena in dielectrics

Phenomenological modelling of non-volatile memory threshold voltage shift induced by nonlinear ionization with a femtosecond laser

Quantitative correlation between Flash and equivalent transistor for endurance electrical parameters extraction

Impact of Line Resistance Combined with Device Variability on Resistive RAM Memories

Suppressing the memory state of floating gate transistors with repeated femtosecond laser backside irradiations

Impact of resistive paths on NVM array reliability: Application to Flash & ReRAM memories

Enhancement of flash memory endurance using short pulsed program/erase signals

Impact of endurance degradation on the programming efficiency and the energy consumption of NOR flash memories

Experimental setup for non-destructive measurement of tunneling currents in semiconductor devices

Improved Performance of Silicon Nanocrystal Memories for Application Working Over a Wide Range of Temperature

Push the flash floating gate memories toward the future low energy application

Effects of Lightly Doped Drain and Channel Doping Variations on Flash Memory Performances and Reliability

Analysis of Conductance Variability in RRAM for Accurate Neuromorphic Computing

Advanced TCAD Simulation of Tunnel Oxide Degradation for EEPROM Applications

STATE: A Test Structure for Rapid Prediction of Resistive RAM Electrical Parameter Variability

Experimental analysis on stochastic behavior of preswitching time in STT-MRAM

1T-NOR Flash memory after endurance degradation: An advanced TCAD simulation

Resistive RAM SET and RESET Switching Voltage Evaluation as an Entropy Source for Random Number Generation

An Augmented OxRAM Synapse for Spiking Neural Network (SNN) Circuits

True random number generation exploiting SET voltage variability in resistive RAM memory arrays

MRAM: from STT to SOT, for security and memory

Impact of a laser pulse on a STT-MRAM bitcell: security and reliability issues

ReRAM ON/OFF resistance ratio degradation due to line resistance combined with device variability in 28nm FDSOI technology

Effect Of Short Pulsed Program/Erase Cycling On Flash Memory Devices

Electromagnetic Analysis Perturbation using Chaos Generator

NVM cell degradation induced by femtosecond laser backside irradiation for reliability tests

Simulation of the programming efficiency and the energy consumption of Flash memories during endurance degradation

Indirect measurement of low tunneling currents through dielectrics using floating gate structures

Impact of Resistive Paths on NVM Array Reliability: Application to Flash & ReRAM Memories

Toward an innovative stochastic modeling of electric charges losses trough dielectrics

Optimization of the ATW Non-Volatile Memory for Connected Smart Objects

Advanced experimental setup for reliability and current consumption measurements of Flash non-volatile memories

A new non-volatile memory cell based on the flash architecture for embedded low energy applications: ATW (Asymmetrical Tunnel Window)

Improving Flash memory endurance and consumption with ultra-short channel-hot-electron programming pulses

Dynamic behavior of silicon nanocrystal memories during the hot carrier injection

Determination of physical properties of semiconductor-oxide-semiconductor structures using a new fast gate current measurement protocol.

How to improve the silicon nanocrystal memory cell performances for low power applications

Optimization of programming consumption of silicon nanocrystal memories for low power applications

Energy consumption optimization in nonvolatile silicon nanocrystal memories

Experimental study to push the Flash floating gate memories toward low energy applications

Programming optimization for low energy NOR Flash memories

A new flash architecture for embedded low energy applications: ATW (Asymmetrical Tunnel Window)

Fiabilité des Mémoires Non-Volatiles de type Flash en architectures NOR et NAND