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22 résultats
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triés par
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Return of the hardware floating-point elementary function18th Symposium on Computer Arithmetic, Jun 2007, Montpellier, France. pp.161-168
Communication dans un congrès
ensl-00117386v1
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A Tool for Unbiased Comparison between Logarithmic and Floating-point ArithmeticJournal of Signal Processing Systems, 2007, 49 (1), pp.161-175. ⟨10.1007/s11265-007-0048-7⟩
Article dans une revue
istex
ensl-00542212v1
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Relation collection for the Function Field SieveARITH 21 - 21st IEEE International Symposium on Computer Arithmetic, Apr 2013, Austin, Texas, United States. pp.201-210, ⟨10.1109/ARITH.2013.28⟩
Communication dans un congrès
hal-00736123v2
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Breaking randomized mixed-radix scalar multiplication algorithmsLATINCRYPT 2019 - 6th International Conference on Cryptology and Information Security in Latin America, Oct 2019, Santiago de Chile, Chile. pp.24-39, ⟨10.1007/978-3-030-30530-7_2⟩
Communication dans un congrès
lirmm-02309203v1
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When FPGAs are better at floating-point than microprocessors2007
Pré-publication, Document de travail
ensl-00174627v1
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Optimal Eta pairing on supersingular genus-2 binary hyperelliptic curvesCryptographer's Track at the RSA Conference 2012 (CT-RSA 2012), Feb 2012, San Francisco, United States. pp.19
Communication dans un congrès
inria-00540002v1
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Multipartite Tables in JBits for the Evaluation of Functions on FPGA[Research Report] RR-4305, LIP RR-2001-44, INRIA, LIP. 2001
Rapport
inria-00072282v1
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Fast Modular Arithmetic on the Kalray MPPA-256 Processor for an Energy-Efficient Implementation of ECMIEEE Transactions on Computers, 2017, 66 (12), pp.2019-2030. ⟨10.1109/TC.2017.2704082⟩
Article dans une revue
hal-01299697v2
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Second Order Function Approximation with a Single Small Multiplication[Research Report] RR-5140, LIP RR-2004-13, INRIA, LIP. 2004
Rapport
inria-00071443v1
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FFS Factory: Adapting Coppersmith's "Factorization Factory" to the Function Field Sieve2014
Pré-publication, Document de travail
hal-01002419v1
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A low-area yet performant FPGA implementation of Shabal17th International Workshop on Selected Areas in Cryptography, SAC 2010, Aug 2010, Waterloo, Canada. pp.99-113, ⟨10.1007/978-3-642-19574-7_7⟩
Communication dans un congrès
inria-00498705v1
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A comparison between hardware accelerators for the modified Tate pairing over $\mathbb{F}_{2^m}$ and $\mathbb{F}_{3^m}$Second International Conference on Pairing-Based Cryptography – Pairing 2008, Sep 2008, Egham, United Kingdom. pp.297-315, ⟨10.1007/978-3-540-85538-5_20⟩
Communication dans un congrès
inria-00423977v1
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Finding Optimal Formulae for Bilinear MapsInternational Workshop of the Arithmetics of Finite Fields, Ruhr Universitat Bochum, Jul 2012, Bochum, Germany. ⟨10.1007/978-3-642-31662-3_12⟩
Communication dans un congrès
hal-00640165v2
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Ballot stuffing in a postal voting system2011 International Workshop on Requirements Engineering for Electronic Voting Systems (REVOTE 2011), 2011, Trento, Italy. pp.27 - 36, ⟨10.1109/REVOTE.2011.6045913⟩
Communication dans un congrès
inria-00612418v1
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Algorithms and arithmetic operators for computing the $\eta_T$ pairing in characteristic threeIEEE Transactions on Computers, 2008, Special Section on Special-Purpose Hardware for Cryptography and Cryptanalysis, 57 (11), pp.1454-1468. ⟨10.1109/TC.2008.103⟩
Article dans une revue
inria-00423993v1
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Fonctions élémentaires en virgule flottante pour les accélérateurs reconfigurablesRevue des Sciences et Technologies de l'Information - Série TSI : Technique et Science Informatiques, 2008, Architecture des Ordinateurs, 27 (6), pp.673-698. ⟨10.3166/tsi.27.673-698⟩
Article dans une revue
inria-00424001v1
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Fast architectures for the $\eta_T$ pairing over small-characteristic supersingular elliptic curvesIEEE Transactions on Computers, 2011, Special Section on Computer Arithmetic, 60 (2), pp.266-281. ⟨10.1109/TC.2010.163⟩
Article dans une revue
inria-00424016v2
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Accelerating lattice reduction with FPGAsFirst International Conference on Cryptology and Information Security in Latin America (LATINCRYPT'10), Aug 2010, Puebla, Mexico. pp.124-143, ⟨10.1007/978-3-642-14712-8_8⟩
Communication dans un congrès
inria-00539929v1
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Arithmetic Operators for Pairing-Based Cryptography9th Invernational Workshop on Cryptographic Hardware and Embedded Systems – CHES 2007, Sep 2007, Vienne, Austria. pp.239-255, ⟨10.1007/978-3-540-74735-2_17⟩
Communication dans un congrès
ensl-00137918v1
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Parameterized floating-point logarithm and exponential functions for FPGAsMicroprocessors and Microsystems: Embedded Hardware Design , 2006, 31 (8), pp.537-545. ⟨10.1016/j.micpro.2006.02.008⟩
Article dans une revue
ensl-00542213v1
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Discrete logarithm in GF($2^{809}$) with FFSPublic-Key Cryptography – PKC 2014, 2014, Buenos Aires, Argentina. ⟨10.1007/978-3-642-54631-0_13⟩
Communication dans un congrès
hal-00818124v3
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Hardware Accelerator for the Tate Pairing in Characteristic Three Based on Karatsuba-Ofman Multipliers11th International Workshop on Cryptographic Hardware and Embedded Systems - CHES 2009, Sep 2009, Lausanne, Switzerland. pp.225-239, ⟨10.1007/978-3-642-04138-9_17⟩
Communication dans un congrès
inria-00424011v1
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