Mon CV

Rei Ueno, Naofumi Homma, Sumio Morioka, Noriyuki Miura, Kohei Matsuda, et al.. High Throughput/Gate AES Hardware Architectures Based on Datapath Compression. IEEE Transactions on Computers, Institute of Electrical and Electronics Engineers, 2020, 69 (4), pp.534-548. ⟨10.1109/TC.2019.2957355⟩. ⟨hal-02517649⟩

Alexander Schaub, Olivier Rioul, Jean-Luc Danger, Sylvain Guilley, Joseph J. Boutros. Challenge Codes for Physically Unclonable Functions with Gaussian Delays: A Maximum Entropy Problem. Advances in Mathematics of Communications, AIMS, In press. ⟨hal-02300795⟩

Debapriya Basu Roy, Shivam Bhasin, Jean-Luc Danger, Sylvain Guilley, Wei He, et al.. The Conflicted Usage of RLUTs for Security-Critical Applications on FPGA. Journal of Hardware and Systems Security, 2018, ⟨10.1007/s41635-018-0035-4⟩. ⟨hal-02288011⟩

Ming Tang, Pengbo Wang, Xiaoqi Ma, Wenjie Chang, Huanguo Zhang, et al.. An Efficient SCA Leakage Model Construction Method Under Predictable Evaluation. IEEE-TIFS, 2018, ⟨10.1109/TIFS.2018.2837644⟩. ⟨hal-02288012⟩

Naghmeh Karimi, Jean-Luc Danger, Sylvain Guilley. Impact of Aging on the Reliability of Delay PUFs. Journal of Electronic Testing, 2018, 34 (5), pp.571-586. ⟨10.1007/s10836-018-5745-6⟩. ⟨hal-02287976⟩

Jean-Luc Danger, Youssef El Housni, Adrien Facon, Cheikh T. Gueye, Sylvain Guilley, et al.. On the Performance and Security of Multiplication in GF(2N). Cryptography, 2018, ⟨10.3390/cryptography2030025⟩. ⟨hal-02288010⟩

Xuan-Thuy Ngo, Jean-Luc Danger, Sylvain Guilley, Tarik Graba, Yves Mathieu, et al.. Cryptographically Secure Shield for Security IPs Protection. IEEE Transcation on Computers, 2017, 66 (2). ⟨hal-02287686⟩

Xuan-Thuy Ngo, Zakaria Najm, Shivam Bhasin, Sylvain Guilley, Jean-Luc Danger. Method taking into account process dispersion to detect hardware Trojan Horse by side-channel analysis. JCEN, 2016, ⟨10.1007/s13389-016-0129-2⟩. ⟨hal-02287501⟩

Jean-Luc Danger, Sylvain Guilley, Ph. Hoogvorst, Cédric Murdica, D. Naccache. Improving the Big Mac Attack on Elliptic Curve Cryptography. LNCS : The new codebreakers, 2016, 9100, pp.374-386. ⟨10.1007/978-3-662-49301-4_23⟩. ⟨hal-02287332⟩

Jean-Luc Danger, Sylvain Guilley, Thibault Porteboeuf, Florian Praden, Michaël Timbert. Hardware-Enforced Protection Against Buffer Overflow Using Masked Program Counter. LNCS: the new codebreakers, 2016, pp.439-454. ⟨10.1007/978-3-662-49301-4_27⟩. ⟨hal-02287333⟩

Ming Tang, Zhipeng Guo, Annelie Heuser, Ren Yanzhen, Jie Li, et al.. PFD - A Flexible Higher-Order Masking Scheme. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE, 2016, 36, pp.1327-1339. ⟨10.1109/tcad.2016.2629441⟩. ⟨hal-01629883⟩

Sho Endo, Yang Li, Naofumi Homma, Kazuo Sakiyama, Kazuo Ohta, et al.. A Silicon-Level Countermeasure Against Fault Sensitivity Analysis and Its Evaluation. IEEE transactions on VLSI systems, 2015, ⟨10.1109/TVLSI.2014.2339892⟩. ⟨hal-02287186⟩

Shivam Bhasin, Jean-Luc Danger, Sylvain Guilley, Wei He. Exploiting FPGA Block Memories for Protected Cryptographic Implementations. TRETS, 2015, ⟨10.1145/2629552⟩. ⟨hal-02287502⟩

Daisuke Fujimoto, Noriyuki Miura, Makoto Nagata, Yuichi Hayashi, Naofumi Homma, et al.. Power Noise Measurements of Cryptographic VLSI Circuits Regarding Side-Channel Information Leakage. IEICE Transactions on Electronics, Institute of Electronics, Information and Communication Engineers, 2014, E97.C (4), pp. 272-279. ⟨hal-01540373⟩

Houssem Maghrebi, Claude Carlet, Jean-Luc Danger, Sylvain Guilley, Emmanuel Prouff. Achieving side-channel high-order correlation immunity with leakage squeezing. JCEN, 2014, ⟨10.1007/s13389-013-0067-1⟩. ⟨hal-02286851⟩

Christophe Clavier, Guillaume Duc, Jean-Luc Danger, Moulay Aziz Elaabid, Benoît Gérard, et al.. Practical Improvements of Side-Channel Attacks on AES: Feedback from the 2nd DPA Contest. Journal of Cryptographic Engineering, 2014, 4 (4), pp.259-274. ⟨10.1007/s13389-014-0075-9⟩. ⟨hal-02286726⟩

Claude Carlet, Jean-Luc Danger, Sylvain Guilley, Houssem Maghrebi. Leakage squeezing: Optimal implementation and security evaluation. Journal of Mathematical Cryptology, 2014, ⟨10.1515/jmc-2012-001⟩. ⟨hal-02287061⟩

Yeow Meng Chee, Zouha Cherif, Jean-Luc Danger, Sylvain Guilley, Han Mao Kiah, et al.. Multiply Constant-Weight Codes and the Reliability of Loop Physically Unclonable Functions. IEEE Transactions in Information Theory, 2014, ⟨10.1109/TIT.2014.2359207⟩. ⟨hal-02286947⟩

Laurent Sauvage, Jean-Luc Danger, Sylvain Guilley, Naofumi Homma, Yu-Ichi Hayashi. Advanced Analysis of Faults Injected Through Conducted Intentional ElectroMagnetic Interferences. Transactions on Electromagnetic Compatibility, 2013. ⟨hal-02286327⟩

Yu-Ichi Hayashi, Naofumi Homma, Takaaki Mizuki, Takafumi Aoki, Hideaki Sone, et al.. Analysis of Electromagnetic Information Leakage from Cryptographic Devices with Different Physical Structures. IEEE Transactions on Electromagnetic Compatibility, 2013, 55 (3), pp.571-580. ⟨hal-02286819⟩

Jean-Luc Danger, Sylvain Guilley, Philippe Hoogvorst, Cédric Murdica, David Naccache. A synthesis of side-channel attacks on elliptic curve cryptography in smart-cards. Journal of Cryptographic Engineering, Springer, 2013, 3 (4), pp.241-265. ⟨10.1007/s13389-013-0062-6⟩. ⟨hal-00934333⟩

Sylvain Guilley, Shivam Bhasin, Annelie Heuser, Jean-Luc Danger. From cryptography to hardware: analyzing and protecting embedded Xilinx BRAM for cryptographic applications. JCEN, 2013, ⟨10.1007/s13389-013-0048-4⟩. ⟨hal-02286503⟩

N. Selmane, Shivam Bhasin, Sylvain Guilley, Jean-Luc Danger. Security evaluation of application-specific integrated circuits and field programmable gate arrays against setup time violation attacks. Information Security, IET, 2011, 5 (4), pp.181-190. ⟨10.1049/iet-ifs.2010.0238⟩. ⟨hal-02286262⟩

Frédéric Guilloud, Emmanuel Boutillon, Jacky Tousch, Jean-Luc Danger. Generic description and synthesis of LDPC decoder. IEEE Transactions on Communications, Institute of Electrical and Electronics Engineers, 2007, Vol. 55 (n°11), pp.2084 - 2091. ⟨10.1109/TCOMM.2007.908517⟩. ⟨hal-00347642⟩

Frédéric Guillou, Emmanuel Boutillon, Jacky Tousch, Jean-Luc Danger. Generic description and synthesis of LDPC decoder. IEEE Transactions on Communications, Institute of Electrical and Electronics Engineers, 2006. ⟨hal-00105435⟩

Emmanuel Boutillon, Jean-Luc Danger, A. Gazel. Design of High Speed AWGN Communication Channel Emulator. Analog Integrated Circuits and Signal Processing, Springer Verlag, 2003, 34, N°2, p133-142. ⟨hal-00105234⟩

Alexandre Menu, Jean-Max Dutertre, Olivier Potin, Jean-Baptiste Rigaud, Jean-Luc Danger. Experimental Analysis of the Electromagnetic Instruction Skip Fault Model. 15th Design & Technology of Integrated Systems in Nanoscale Era (DTIS 2020), Apr 2020, Marrakech, Morocco. ⟨10.1109/DTIS48698.2020.9081261⟩. ⟨hal-02572398⟩

Brice Colombier, Alexandre Menu, Jean-Max Dutertre, Pierre-Alain Moëllic, Jean-Baptiste Rigaud, et al.. Laser-induced Single-bit Faults in Flash Memory: Instructions Corruption on a 32-bit Microcontroller. 2019 IEEE International Symposium on Hardware Oriented Security and Trust (HOST), May 2019, McLean, United States. pp.1-10, ⟨10.1109/HST.2019.8741030⟩. ⟨hal-02344050⟩

Etienne Tehrani, Tarik Graba, Abdelmalek Si Merabet, Sylvain Guilley, Jean-Luc Danger. Classification of Lightweight Block Ciphers for Specific Processor Accelerated Implementations. 2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Nov 2019, Genoa, Italy. pp.747-750, ⟨10.1109/ICECS46596.2019.8965156⟩. ⟨hal-02517585⟩

Oualid Trabelsi, Laurent Sauvage, Jean-Luc Danger. Characterization at Logical Level of Magnetic Injection Probes. 2019 Joint International Symposium on Electromagnetic Compatibility and Asia-Pacific International Symposium on Electromagnetic Compatibility, Jun 2019, Sapporo, Japan. ⟨hal-02318716⟩

Shugo Kaji, Masahiro Kinugawa, Daisuke Fujimoto, Laurent Sauvage, Jean-Luc Danger, et al.. Method for Identifying Individual Electronic Devices Focusing on Differences in Spectrum Emissions. 2019 Joint International Symposium on Electromagnetic Compatibility and Asia-Pacific International Symposium on Electromagnetic Compatibility, Sep 2019, Sapporo, Japan. ⟨hal-02319485⟩

Etienne Tehrani, Tarik Graba, Jean-Luc Danger. Acceleration of Lightweight Block Ciphers on Microprocessors. CryptArchi 2019, Jun 2019, Prague, Poland. ⟨hal-02271470⟩

Alexandre Menu, Shivam Bhasin, Jean-Max Dutertre, Jean-Baptiste Rigaud, Jean-Luc Danger. Precise Spatio-Temporal Electromagnetic Fault Injections on Data Transfers. 2019 Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC), Aug 2019, Atlanta, United States. pp.1-8, ⟨10.1109/FDTC.2019.00009⟩. ⟨hal-02338456⟩

Jean-Luc Danger, Sylvain Guilley, Alexander Schaub. Two-Metric Helper Data for Highly Robust and Secure Delay PUFs. 2019 IEEE 8th International Workshop on Advances in Sensors and Interfaces (IWASI), Jun 2019, Otranto, Italy. pp.184-188, ⟨10.1109/IWASI.2019.8791249⟩. ⟨hal-02302114⟩

Jean-Luc Danger, Laurent Fribourg, Ulrich Kühne, Maha Naceur. LAOCOÖN: A Run-Time Monitoring and Verification Approach for Hardware Trojan Detection. 2019 22nd Euromicro Conference on Digital System Design (DSD), Aug 2019, Kallithea, Greece. pp.269-276, ⟨10.1109/DSD.2019.00047⟩. ⟨hal-02338436⟩

Etienne Tehrani, Jean-Luc Danger, Tarik Graba. Generic Architecture for Lightweight Block Ciphers: A First Step Towards Agile Implementation of Multiple Ciphers. 12th IFIP International Conference on Information Security Theory and Practice (WISTP), Dec 2018, Brussels, Belgium. pp.28-43, ⟨10.1007/978-3-030-20074-9_4⟩. ⟨hal-02294599⟩

Jean-Luc Danger, Adrien Facon, Sylvain Guilley, Karine Heydemann, Ulrich Kühne, et al.. CCFI-Cache: A Transparent and Flexible Hardware Protection for Code and Control-Flow Integrity. 2018 21st Euromicro Conference on Digital System Design (DSD), Aug 2018, Prague, Czech Republic. pp.529-536, ⟨10.1109/DSD.2018.00093⟩. ⟨hal-01900361⟩

Naghmeh Karimi, Sylvain Guilley, Jean-Luc Danger. Impact of Aging on Template Attacks. GLSVLSI, May 2018, Chicago, United States. pp.455-458, ⟨10.1145/3194554.3194638⟩. ⟨hal-02412366⟩

Alexander Schaub, Jean-Luc Danger, Sylvain Guilley, Olivier Rioul. An improved analysis of reliability and entropy for delay PUFs. Euromicro Conference on Digital System Design (DSD'18), Aug 2018, Prague, Czech Republic. ⟨hal-02288537⟩

Naghmeh Karimi, Sylvain Guilley, Jean-Luc Danger. On the Effect of Aging in Detecting Hardware Trojan Horses with Template Analysis.. IOLTS, Jul 2018, Platja d'Aro, Spain. ⟨10.1109/IOLTS.2018.8474089⟩. ⟨hal-02288013⟩

Alexander Schaub, Jean-Luc Danger, Sylvain Guilley, Olivier Rioul. Reliability and entropy of delay PUFs: A theoretical analysis. 16th International Workshop on Cryptographic Architectures Embedded in Logic Devices (CryptArchi 2018), Jun 2018, Lorient, France. ⟨hal-02287933⟩

Alexander Schaub, Olivier Rioul, Joseph Boutros, Jean-Luc Danger, Sylvain Guilley. Challenge codes for physically unclonable functions with Gaussian delays: A maximum entropy problem. Latin American Workshop on Coding and Information, Jul 2018, Unicamp-Campinas, Brazil. ⟨hal-02287965⟩

Jean-Luc Danger, Risa Yashiro, Tarik Graba, Yves Mathieu, Abdelmalek Si-Merabet, et al.. Analysis of Mixed PUF-TRNG Circuit Based on SR-Latches in FD-SOI Technology. 2018 21st Euromicro Conference on Digital System Design (DSD), Aug 2018, Prague, Czech Republic. pp.508-515. ⟨hal-02271687⟩

Jean-Luc Danger. Formalism to assess and enhance the entropy and reliability of a Loop-PUF. CRYPTO'IC, Sep 2017, Chengdu, China. ⟨hal-02287902⟩

Naghmeh Karimi, Jean-Luc Danger, Florent Lozac'H, Sylvain Guilley. Impact of the switching activity on the aging of delay-PUFs. ETS, May 2017, Limassol, Greece. ⟨10.1109/ETS.2017.7968223⟩. ⟨hal-02412489⟩

Jean-Luc Danger, Sylvain Guilley, Philippe Nguyen, Robert Nguyen, Youssef Souissi. Analyzing security breaches of countermeasures throughout the refinement process in hardware design flow. DATE, Dec 2017, lausanne, Switzerland. ⟨10.23919/DATE.2017.7927159⟩. ⟨hal-02412314⟩

Noriyuki Miura, Kohei Matsuda, Karol Myszkowski, Makoto Nagata, Shivam Bhasin, et al.. A 2.5ns-Latency 0.39pJ/b 289µm2/Gb/s Ultra-Light-Weight PRINCE Cryptographic Processor. Symposium on VLSI Circuits, Jun 2017, Kyoto, Japan. pp.C266-C267. ⟨hal-02288491⟩

Jean-Luc Danger, Olivier Rioul, Sylvain Guilley, Alexander Schaub. Formalism to assess the entropy and reliability of the loop-PUF. 15th International Workshop on Cryptographic Architectures Embedded in Reconfigurable Devices (CryptArchi 2017), Jun 2017, Smolenice, Slovakia. ⟨hal-02287598⟩

Olivier Rioul, Patrick Solé, Sylvain Guilley, Jean-Luc Danger. On the Entropy of Physically Unclonable Functions. 2016 IEEE International Symposium on Information Theory (ISIT'16), Jul 2016, Barcelona, Spain. ⟨hal-02288459⟩

Naghmeh Karimi, Jean-Luc Danger, Florent Lozac'H, Sylvain Guilley. Predictive Aging of Reliability of Two Delay PUFs. SPACE, Dec 2016, Hyderabad, India. ⟨10.1007/978-3-319-49445-6_12⟩. ⟨hal-02412243⟩

Noriyuki Miura, Zakaria Najm, Wei He, Shivam Bhasin, Xuan-Thuy Ngo, et al.. PLL to the rescue: a novel EM fault countermeasure. DAC, Jun 2016, Austin, United States. ⟨10.1145/2897937.2898065⟩. ⟨hal-02288461⟩

Jean-Luc Danger, Sylvain Guilley, Philippe Nguyen, Olivier Rioul. PUFs: Standardization and Evaluation. 2nd IEEE Workshop on Mobile System Technologies (MST 2016), Sep 2016, Milano, Italy. ⟨hal-02288475⟩

Jean-Luc Danger. Overview of Protections Against IC Counterfeiting and Hardware Trojan Horses. ISSCC, Jan 2016, Sab Francisco, United States. ⟨hal-02287903⟩

Kazuhide Fukushima, Youssef Souissi, Seira Hidano, Robert Nguyen, Jean-Luc Danger, et al.. Delay PUF Assessment Method Based on Side-Channel and Modeling Analyzes. TrustCom-16, Aug 2016, Tianjin, China. ⟨hal-02287456⟩

Olivier Rioul, Patrick Solé, Sylvain Guilley, Jean-Luc Danger. A challenge code for maximizing the entropy of PUF responses. Cryptographic Architectures Embedded in Reconfigurable Devices (CryptArchi 2016), Jun 2016, Montpellier, France. ⟨hal-02287330⟩

Olivier Rioul, Annelie Heuser, Sylvain Guilley, Jean-Luc Danger. Inter-Class vs. Mutual Information as Side-Channel Distinguishers. 2016 IEEE International Symposium on Information Theory (ISIT'16), Jul 2016, Barcelona, Spain. ⟨hal-02287308⟩

Margaux Dugardin, Sylvain Guilley, Jean-Luc Danger, Zakaria Najm, Olivier Rioul. Correlated Extra-Reductions Defeat Blinded Regular Exponentiation. Cryptographic Hardware and Embedded Systems – CHES 2016, Aug 2016, Santa Barbara, United States. pp.Pages 3-22. ⟨hal-01362463⟩

Margaux Dugardin, Papachristodoulou Louiza, Zakaria Najm, Lejla Batina, Jean-Luc Danger, et al.. Dismantling Real-World ECC with Horizontal and Vertical Template Attacks. Constructive Side-Channel Analysis and Secure Design - COSADE 2016, Apr 2016, Graz, Austria. pp 88-108. ⟨hal-01362466⟩

Xuan Thuy Ngo, Jean-Luc Danger, Sylvain Guilley, Zakaria Najm, Olivier Emery. Hardware property checker for run-time Hardware Trojan detection. Euromicro Conference on Digital System Design (DSD) 2015, Aug 2015, Trondheim, Norway. ⟨10.1109/ECCTD.2015.7300085⟩. ⟨hal-01240226⟩

Lionel Rivière, Zakaria Najm, Pablo Rauzy, Jean-Luc Danger, Julien Bringer, et al.. High Precision Fault Injections on the Instruction Cache of ARMv7-M Architectures. HOST 2015: IEEE International Symposium on Hardware-Oriented Security and Trust, May 2015, Washington, United States. ⟨10.1109/HST.2015.7140238⟩. ⟨hal-01208378⟩

Emna Amouri, Shivam Bhasin, Yves Mathieu, Tarik Graba, Jean-Luc Danger. Countering Early Propagation and Routing Imbalance of DPL. International Conference on IC Design and Technology (ICICDT), Jun 2015, Leuven, Belgium. ⟨10.1109/ICICDT.2015.7165897⟩. ⟨hal-02287122⟩

Xuan Thuy Ngo, Zakaria Najm, Shivam Bhasin, Debapriya Basu, Jean-Luc Danger, et al.. Integrated Sensor: A Backdoor for Hardware Trojan Insertions?. Euromicro Conference on Digital System Design (DSD) 2015, Aug 2015, Funchal, Portugal. ⟨10.1109/DSD.2015.119⟩. ⟨hal-01240221⟩

Henitsoa Rakotomalala, Xuan Thuy Ngo, Zakaria Najm, Jean-Luc Danger, Sylvain Guilley. Private Circuits II versus Fault Injection Attacks. Reconfig 2015, Dec 2015, Mayan Riviera, Mexico. ⟨hal-01240244⟩

Xuan Thuy Ngo, Shivam Bhasin, Jean-Luc Danger, Sylvain Guilley, Zakaria Najm. Linear complementary dual code improvement to strengthen encoded circuit against hardware Trojan horses. IEEE International Symposium on Hardware Oriented Security and Trust (HOST) 2015, May 2015, McLean, United States. ⟨10.1109/HST.2015.7140242⟩. ⟨hal-01240228⟩

Daisuke Fujimoto, Makoto Nagata, Shivam Bhasin, Jean-Luc Danger. A novel methodology for testing hardware security and trust exploiting On-Chip Power noise Measurement. ASP-DAC, Jan 2015, Tokyo, Japan. ⟨10.1109/ASPDAC.2015.7059100⟩. ⟨hal-02412244⟩

Jean-Luc Danger, Yves Mathieu, Thibault Porteboeuf. IC variability : Pros and cons for security blocks. TRUDEVICE, Mar 2015, Grenoble, France. ⟨hal-02412162⟩

Debapriya Basu Roy, Shivam Bhasin, Sylvain Guilley, Jean-Luc Danger, Debdeep Mukhopadhyay. From theory to practice of private circuit: A cautionary note. ICCD, Oct 2015, New York, United States. ⟨10.1109/ICCD.2015.7357117⟩. ⟨hal-02412245⟩

Viktor Fischer, Lilian Bossuet, Jean-Luc Danger. Underneath the FPGA Clothes: Enhancing Security: FPL TUTORIAL. 25th International Conference Field Programmable Logic and Applications, FPL 2015, Sep 2015, Londre, United Kingdom. ⟨hal-01279193⟩

Said Hamdioui, Giorgio Di Natale, Battum Van, Jean-Luc Danger, Fethulah Smailbegovic, et al.. Hacking and Protecting IC Hardware. DATE: Design, Automation and Test in Europe, Mar 2014, Dresden, Germany. ⟨10.7873/DATE.2014.112⟩. ⟨lirmm-01234147⟩

Xuan Thuy Ngo, Sylvain Guilley, Shivam Bhasin, Jean-Luc Danger, Zakaria Najm. Encoding the State of Integrated Circuits: a Proactive and Reactive Protection against Hardware Trojans Horses. Workshop on Embedded Systems Security (WESS 2014), Oct 2014, New Delhi, India. ⟨10.1145/2668322.2668329⟩. ⟨hal-01240242⟩

Xuan Thuy Ngo, Zakaria Najm, Shivam Bhasin, Sylvain Guilley, Jean-Luc Danger. Method Taking into Account Process Dispersions to Detect Hardware Trojan Horse by Side-Channel. PROOFS: Security Proofs for Embedded Systems 2014, Sep 2014, BUSAN, South Korea. ⟨hal-01240241⟩

Jean-Michel Cioranesco, Jean-Luc Danger, Tarik Graba, Sylvain Guilley, Yves Mathieu, et al.. Cryptographically secure shields. HOST 2014 - IEEE International Symposium on Hardware-Oriented Security and Trust, May 2014, Washington, United States. pp.25 - 31, ⟨10.1109/HST.2014.6855563⟩. ⟨hal-01110463⟩

Emna Amouri, Shivam Bhasin, Yves Mathieu, Tarik Graba, Jean-Luc Danger, et al.. Balancing WDDL dual-rail logic in a tree-based FPGA to enhance physical security. FPL 2014 - 24th International Conference on Field Programmable Logic and Applications, Sep 2014, Munich, Germany. pp.1--4, ⟨10.1109/FPL.2014.6927422⟩. ⟨hal-01372613⟩

Taoufik Chouta, Tarik Graba, Jean-Luc Danger, Julien Bringer, Maël Berthier, et al.. Side channel analysis on an embedded hardware fingerprint biometric comparator & low cost countermeasures.. HASP, Jun 2014, Minneapolis, United States. ⟨10.1145/2611765.2611771⟩. ⟨hal-02412116⟩

Shivam Bhasin, Jean-Luc Danger, Sylvain Guilley, Zakaria Najm. Side-channel leakage and trace compression using normalized inter-class variance.. HASP, Jun 2014, Minneapolis, United States. ⟨10.1145/2611765.2611772⟩. ⟨hal-02412117⟩

Jean-Luc Danger, Sylvain Guilley, Florian Praden. Hardware-enforced Protection against Software Reverse-Engineering based on an Instruction Set Encoding. PPREW, Jan 2014, San Diego, United States. ⟨10.1145/2556464.2556469⟩. ⟨hal-02412068⟩

Daisuke Fujimoto, Daichi Tanaka, Noriyuki Miura, Makoto Nagata, Yu-Ichi Hayashi, et al.. Side-channel leakage on silicon substrate of CMOS cryptographic chip. HOST, May 2014, Washington DC, United States. ⟨10.1109/HST.2014.6855564⟩. ⟨hal-02412069⟩

Saïd Hamdiaoui, Jean-Luc Danger, Giorgio Di Natale, Fethulah Smailbegovic, Gerard van Battum, et al.. Hacking and protecting IC hardware. DATE, Mar 2014, Dresden, Germany. ⟨hal-02412114⟩

Shivam Bhasin, Tarik Graba, Jean-Luc Danger, Zakaria Najm. A Look into SIMON from a Side-channel Perspective. HOST, May 2014, Washington DC, United States. ⟨10.1109/HST.2014.6855568⟩. ⟨hal-02412115⟩

Shivam Bhasin, Jean-Luc Danger, Sylvain Guilley, Zakaria Najm. NICV: Normalized Inter-Class Variance for Detection of Side-Channel Leakage. EMC, May 2014, Tokyo, Japan. ⟨hal-02412040⟩

Shivam Bhasin, Jean-Luc Danger, Tarik Graba, Yves Mathieu. Physical Security Evaluation at an Early Design-Phase: A Side-Channel Aware Simulation Methodology. ES4CPS, Mar 2014, Dresden, Germany. ⟨10.1145/2559627.2559628⟩. ⟨hal-02412041⟩

Shivam Bhasin, Nicolas Bruneau, Jean-Luc Danger, Sylvain Guilley, Zakaria Najm. Analysis and Improvements of the DPA Contest v4 Implementation. SPACE, Oct 2014, Pune, India. ⟨10.1007/978-3-319-12060-7_14⟩. ⟨hal-02288411⟩

Nicolas Bruneau, Jean-Luc Danger, Sylvain Guilley, Annelie Heuser, Yannick Teglia. Boosting High-Order Correlation Attacks by Dimensionality Reduction. SPACE, Oct 2014, Pune, India. ⟨10.1007/978-3-319-12060-7_13⟩. ⟨hal-02286958⟩

Jean-Luc Danger. How to get a trusted FPGA ?. Workshop INRIA, May 2014, Rennes, France. ⟨hal-02412161⟩

Yuto Nakano, Youssef Souissi, Robert Nguyen, Laurent Sauvage, Jean-Luc Danger, et al.. A Pre-processing Composition for Secret Key Recovery on Android Smartphone. 8th IFIP International Workshop on Information Security Theory and Practice (WISTP), Jun 2014, Heraklion, Crete, Greece. pp.76-91, ⟨10.1007/978-3-662-43826-8_6⟩. ⟨hal-01400921⟩

Michaël Timbert, Jean-Luc Danger, Sylvain Guilley, Thibault Porteboeuf, Florian Praden. HCODE: Hardware-Enhanced Real-Time CFI. PPREW@ACSAC 2014, Dec 2014, New Orleans, United States. ⟨10.1145/2689702.2689708⟩. ⟨hal-01575947⟩

Jean-Luc Danger, Florent Lozac'H, Zouha Cherif. Methods to Enhance the Reliability of Key Generation from Physically Unclonable Functions. PROOFS, Sep 2014, Busan, South Korea. ⟨hal-02412476⟩

Lubos Gaspar, Marek Repka, Houssem Maghrebi, Jean-Luc Danger, Viktor Fischer. Cryptoprocessor with Native Resistance against Side Channel and Fault Injection Attacks. Wseas, Dec 2014, Istanbul, Turkey. ⟨hal-02412163⟩

Zouha Cherif, Jean-Luc Danger, Lilian Bossuet. Evaluation of Delay PUFs on CMOS 65 nm Technology: ASIC vs FPGA. International Workshops on Cryptographic Architectures Embedded in Reconfigurable Devices CryptArchi 2013, Jun 2013, Fréjus, France. ⟨ujm-00840962⟩

Zouha Cherif, Jean-Luc Danger, Lilian Bossuet. Evaluation of Delays PUFs on CMOS 65 nm Technology: ASIC vs FPGA. Workshop on Trustworthy Manufacturing and Utilization of Secure Devices, TRUDEVICE 2013, May 2013, Avignon, France. ⟨ujm-00833893⟩

Daisuke Fujimoto, Noriyuki Miura, Makoto Nagata, Yuichi Hayashi, Naofumi Homma, et al.. On-Chip Power Noise Measurements of Cryptographic VLSI Circuits and Interpretation for Side-Channel Analysis. International Symposium on Electromagnetic Compatibility (EMC Europe), Sep 2013, Brugge, Belgium. pp.405-410. ⟨hal-01215214⟩

Yu-Ichi Hayashi, Naofumi Homma, Takaaki Mizuki, Takafumi Aoki, Hideaki Sone, et al.. Introduction to Recent Research on EM Information Leakage. Asia-Pacific Symposium on Electromagnetic Compatibility (APEMC2013), May 2013, Melbourne, Australia. pp.320-323. ⟨hal-02286818⟩

Shivam Bhasin, Jean-Luc Danger, Sylvain Guilley, Xuan Thuy Ngo, Laurent Sauvage. Hardware Trojan Horses in Cryptographic IP Cores. FDTC (Fault Detection and Tolerance in Cryptography), Aug 2013, Santa Barbara, United States. pp.15-29, ⟨10.1109/FDTC.2013.15⟩. ⟨hal-00855146v2⟩

Molka Ben Romdhane, Jean-Luc Danger, Tarik Graba, Yves Mathieu. Design Methodology of an ASIC TRNG based on an open-loop delay chain. NEWCAS, Jun 2013, Paris, France. ⟨10.1109/NEWCAS.2013.6573654⟩. ⟨hal-02411986⟩

Florent Lozac'H, Molka Ben Romdhane, Tarik Graba, Jean-Luc Danger. FPGA design of an Open-Loop True Random Number Generator. 16th euromicro conference on digital system design, Sep 2013, Santander, Spain. pp.615-622, ⟨10.1109/DSD.2013.73⟩. ⟨hal-02412025⟩

Shivam Bhasin, Jean-Luc Danger, Sylvain Guilley, Zakaria Najm. A Low-Entropy First-Degree Secure Provable Masking Scheme for Resource-Constrained Devices. WESS, Sep 2013, Montreal, Canada. ⟨10.1145/2527317.2527324⟩. ⟨hal-02412039⟩

Zouha Cherif, Jean-Luc Danger, Florent Lozac'H, Yves Mathieu, Lilian Bossuet. Evaluation of delay PUFs on CMOS 65nm technology: ASIC vs FPGA. International Workshop on Hardware and Architectural Support for Security and Privacy, HASP 2013, Jun 2013, Tel-Aviv, Israel. pp.Article n° 4. ⟨hal-00859079⟩

Molka Ben Romdhane, Tarik Graba, Jean-Luc Danger. Stochastic model of a Metastability-based True Random Number Generator. TRUST, Jun 2013, Londres, United Kingdom. ⟨10.1007/978-3-642-38908-5_7⟩. ⟨hal-02412461⟩

Pierre Belgarric, Shivam Bhasin, Nicolas Bruneau, Jean-Luc Danger, Nicolas Debande, et al.. Time-frequency analysis for second-order attacks. Smart Card Research and Advanced Application Conference (CARDIS 2013), Nov 2013, Berlin, Germany. pp.108-122. ⟨hal-02299996⟩

Houssem Maghrebi, Sylvain Guilley, Olivier Rioul, Jean-Luc Danger. Some results about the distinction of side-channel distinguishers based on distributions. 10th International Workshop on Cryptographic Architectures Embedded in Reconfigurable Devices (CryptArchi 2012), Jun 2012, Saint-Etienne, France. ⟨hal-02286359⟩

Sébastien Briais, Jean-Michel Cioranesco, Jean-Luc Danger, Sylvain Guilley, David Naccache, et al.. Random Active Shield. Fault Diagnosis and Tolerance in Cryptography, Sep 2012, Leuven, Belgium. 11 p., ⟨10.1109/FDTC.2012.11⟩. ⟨hal-00721569v2⟩

Jean-Luc Danger. Delay PUF Overview. GDR Soc-SIP, Nov 2012, Paris, France. ⟨hal-02286508⟩

Zhoua Cherif Jouini, Jean-Luc Danger, Sylvain Guilley, Lilian Bossuet. An Easy-to-Design PUF based on a Single Oscillator: the Loop PUF. 15th Euromicro Conference on Digital System Design(DSD), Sep 2012, Cesme, Izmir, Turkey. 7 p. ⟨hal-00753216⟩

Zhoua Cherif Jouini, Jean-Luc Danger, Lilian Bossuet. Physically Unclonable Functions Characterisation. Colloque du GDR SoC-SiP, Jun 2012, Paris, France. ⟨hal-00753222⟩

Endo Sho, Yuichi Hayashi, Naofumi Homma, Takafumi Aoki, Toshihiro Katashita, et al.. Measurement of side-channel information from cryptographic devices on security evaluation platform: Demonstration of SPACES project. SICE Annual Conference, Aug 2012, Akita, Japan. ⟨hal-01540506⟩

Youssef Souissi, Nicolas Debande, Sami Mekki, Sylvain Guilley, Ali Maalaoui, et al.. On the Optimality of Correlation Power Attack on Embedded Cryptographic Systems. 6th International Workshop on Information Security Theory and Practice (WISTP), Jun 2012, Egham, United Kingdom. pp.169-178, ⟨10.1007/978-3-642-30955-7_15⟩. ⟨hal-01534305⟩

Cedric Murdica, Jean-Luc Danger, Sylvain Guilley, Philippe Hoogvorst, David Naccache. Low-Cost Countermeasure against RPA. CARDIS 2012, Nov 2012, Graz, Austria. pp.106-122. ⟨hal-00799421⟩

Cedric Murdica, Jean-Luc Danger, Sylvain Guilley, Philippe Hoogvorst, David Naccache. Same Values Power Analysis Using Special Points on Elliptic Curves. COSADE 2012 - Third International Workshop Constructive Side-Channel Analysis and Secure Design, May 2012, Darmstadt, Germany. pp.Cédric Murdica, ⟨10.1007/978-3-642-29912-4_14⟩. ⟨hal-00686565⟩

Maxime Nassar, Youssef Souissi, Sylvain Guilley, Jean-Luc Danger. RSM: a Small and Fast Countermeasure for AES, Secure against 1st and 2nd-order Zero-Offset SCAs. Design Automation and Test in Europe, Mar 2012, Desden, Germany. pp.1173-1178. ⟨hal-00666337⟩

Youssef Souissi, Shivam Bhasin, Maxime Nassar, Sylvain Guilley, Jean-Luc Danger. Towards Different Flavors of Combined Side Channel Attacks. CT-RSA, Feb 2012, San Francisco, United States. pp.245-259, ⟨10.1007/978-3-642-27954-6_16⟩. ⟨hal-02288312⟩

Houssem Maghrebi, Emmanuel Prouff, Sylvain Guilley, Jean-Luc Danger. A First-Order Leak-Free Masking Countermeasure. CT-RSA, Feb 2012, San Francisco, CA, United States. pp.156-170, ⟨10.1007/978-3-642-27954-6_10⟩. ⟨hal-02288316⟩

Haruki Shimada, Yu-Ichi Hayashi, Naofumi Homma, Takaaki Mizuki, Takafumi Aoki, et al.. Efficient mapping of EM radiation associated with information leakage for cryptographic devices. EMC, Aug 2012, Pittsburgh, United States. pp.794-799, ⟨10.1109/ISEMC.2012.6351663⟩. ⟨hal-02288342⟩

Claude Carlet, Jean-Luc Danger, Sylvain Guilley, Houssem Maghrebi. Leakage Squeezing of Order Two. IndoCypt, Dec 2012, Kolkata, India. ⟨10.1007/978-3-642-34931-7_8⟩. ⟨hal-02411906⟩

Nicolas Debande, Youssef Souissi, Moulay Aziz Elaabid, Sylvain Guilley, Jean-Luc Danger. Wavelet Transform Based Pre-processing for Side Channel Analysis. HASP, Dec 2012, Vancouver, Canada. ⟨10.1109/MICROW.2012.15⟩. ⟨hal-02411932⟩

Shivam Bhasin, Sylvain Guilley, Jean-Luc Danger. From cryptography to hardware: analyzing embedded Xilinx BRAM for cryptographic applications. HASP, Dec 2012, Vancouver, Canada. ⟨10.1109/MICROW.2012.11⟩. ⟨hal-02411933⟩

Houssem Maghrebi, Sylvain Guilley, Claude Carlet, Jean-Luc Danger. Optimal First-Order Masking with Linear and Non-Linear Bijections. AfricaCrypt, Jul 2012, Ifrane, Morocco. ⟨10.1007/978-3-642-31410-0_22⟩. ⟨hal-02411869⟩

Houssem Maghrebi, Emmanuel Prouff, Sylvain Guilley, Jean-Luc Danger. Register Leakage Masking Using Gray Code. HOST, Jun 2012, San Francisco, United States. ⟨10.1109/HST.2012.6224316⟩. ⟨hal-02411870⟩

Laurent Sauvage, Sylvain Guilley, Jean-Luc Danger, Naofumi Homma, Yu-Ichi Hayashi. A Fault Model for Conducted Intentional ElectroMagnetic Interferences. EMC, Aug 2012, Pittsburgh, United States. pp.788-793, ⟨10.1109/ISEMC.2012.6351664⟩. ⟨hal-02411875⟩

Sébastien Briais, Stéphane Caron, Jean-Michel Cioranesco, Jean-Luc Danger, Sylvain Guilley, et al.. 3D Hardware Canaries. CHES 2012 - 14th International Workshop Cryptographic Hardware and Embedded Systems, Sep 2012, Leuven, Belgium. pp.1-22, ⟨10.1007/978-3-642-33027-8_1⟩. ⟨hal-01111533⟩

Briais Sébastien, Sylvain Guilley, Jean-Luc Danger. A formal study of two physical countermeasures against side channel attacks. PROOFS, Sep 2012, Leuven, Belgium. ⟨10.1007/s13389-013-0054-6⟩. ⟨hal-02286504⟩

Taoufik Chouta, Jean-Luc Danger, Laurent Sauvage, Tarik Graba. A Small and High-performance Coprocessor for Fingerprint Match-On-Card. DSD, Sep 2012, Cesme/Izmir, Turkey. ⟨10.1109/DSD.2012.14⟩. ⟨hal-02286419⟩

Sylvain Guilley, Jean-Luc Danger, Robert Nguyen, Philippe Nguyen. System-Level Methods to Prevent Reverse-Engineering, Cloning, and Trojan Insertion. ICISTM, Mar 2012, Grenoble, France. pp.433-438, ⟨10.1007/978-3-642-29166-1_41⟩. ⟨hal-00701990v2⟩

Houssem Maghrebi, Olivier Rioul, Sylvain Guilley, Jean-Luc Danger. Comparison between Side-Channel Analysis Distinguishers. 14th International Conference on Information and Communications Security (ICICS'2012), Oct 2012, Hong Kong, China. pp.331-340. ⟨hal-02299929⟩

Zhoua Cherif Jouini, Jean-Luc Danger, Lilian Bossuet. Performance Evaluation of Silicon Physically Unclonable Function by Studing Physicals Values. 9th IEEE International NEWCAS conference 2011, Jun 2011, Bordeaux, France. pp.482-485. ⟨hal-00605720⟩

Sylvain Guilley, Olivier Meynard, Maxime Nassar, Guillaume Duc, Philippe Hoogvorst, et al.. Vade Mecum on Side-Channels Attacks and Countermeasures for the Designer and the Evaluator. Design & Technology of Integrated Systems, Apr 2011, Athens, Greece. pp.6, ⟨10.1109/DTIS.2011.5941419⟩. ⟨hal-00579020v2⟩

Houssem Maghrebi, Sylvain Guilley, Jean-Luc Danger. Leakage Squeezing Countermeasure against High-Order Attacks. 5th Workshop on Information Security Theory and Practices (WISTP), Jun 2011, Heraklion, Crete, Greece. pp.208-223, ⟨10.1007/978-3-642-21040-2_14⟩. ⟨hal-01573295⟩

Sylvain Guilley, Karim Khalfallah, Victor Lomne, Jean-Luc Danger. Formal Framework for the Evaluation of Waveform Resynchronization Algorithms. 5th Workshop on Information Security Theory and Practices (WISTP), Jun 2011, Heraklion, Crete, Greece. pp.100-115, ⟨10.1007/978-3-642-21040-2_7⟩. ⟨hal-01573296⟩

Nicolas Debande, Youssef Souissi, Thanh-Ha Le, Sylvain Guilley, Jean-Luc Danger. A Multiresolution Time-Frequency Analysis Based Side Channel Attacks. WIFS Poster Session, Nov 2011, Iguacu Falls, Brazil. ⟨hal-02411850⟩

Luc Moreau, Alexis Polti, Jean-Luc Danger, Jean-Marie Nicolas, Renaud Fallourd, et al.. De la roue au radar : quelques innovations en métrologie radar. 5éme Colloque Interdisciplinaire en Instrumentation (C2I), Jan 2010, Le Mans, France. pp.110-118. ⟨halsde-00461037⟩

Sylvain Guilley, Laurent Sauvage, Jean-Luc Danger, Nidhal Selmane. Fault Injection Resilience. Fault Diagnosis and Tolerance in Cryptography, Aug 2010, Santa Barbara, United States. pp.51-65, ⟨10.1109/FDTC.2010.15⟩. ⟨hal-00482194v9⟩

Houssem Maghrebi, Sylvain Guilley, Jean-Luc Danger, Florent Flament. Entropy-based Power Attack. Hardware-Oriented Security and Trust, Jun 2010, Anaheim, CA, United States. pp.1-6, ⟨10.1109/HST.2010.5513124⟩. ⟨hal-00618482v2⟩

Shivam Bhasin, Jean-Luc Danger, Florent Flament, Tarik Graba, Sylvain Guilley, et al.. Combined SCA and DFA Countermeasures Integrable in a FPGA Design Flow. ReConFig, Dec 2009, Cancún, Mexico. pp.213 - 218, ⟨10.1109/ReConFig.2009.50⟩. ⟨hal-00411843v3⟩

Nidhal Selmane, Shivam Bhasin, Sylvain Guilley, Tarik Graba, Jean-Luc Danger. WDDL is Protected Against Setup Time Violation Attacks. CHES, Sep 2009, Lausanne, Switzerland. pp.73-83, ⟨10.1109/FDTC.2009.40⟩. ⟨hal-00410135⟩

Laurent Sauvage, Sylvain Guilley, Jean-Luc Danger, Yves Mathieu, Maxime Nassar. Successful Attack on an FPGA-based WDDL DES Cryptoprocessor Without Place and Route Constraints.. Design, Automation & Test in Europe Conference & Exhibition, 2009. DATE '09., Apr 2009, NICE, France. pp.640-645. ⟨hal-00325417v3⟩

Houssem Maghrebi, Jean-Luc Danger, Florent Flament, Sylvain Guilley, Laurent Sauvage. Evaluation of Countermeasure Implementations Based on Boolean Masking to Thwart Side-Channel Attacks. SCS, Nov 2009, Jerba, Tunisia. 6 p., ⟨10.1109/ICSCS.2009.5412597⟩. ⟨hal-00425523v4⟩

Sylvain Guilley, Sumanta Chaudhuri, Laurent Sauvage, Tarik Graba, Jean-Luc Danger, et al.. Shall we trust WDDL?. Future of Trust in Computing, Jun 2008, Berlin, Germany. pp.208-215, ⟨10.1007/978-3-8348-9324-6_22⟩. ⟨hal-00409024⟩

Sylvain Guilley, Laurent Sauvage, Jean-Luc Danger, Nidhal Selmane, Renaud Pacalet. Silicon-level Solutions to Counteract Passive and Active Attacks. FDTC, Aug 2008, Washington, DC, United States. pp.3-17, ⟨10.1109/FDTC.2008.18⟩. ⟨hal-00311431⟩

Sylvain Guilley, Laurent Sauvage, Jean-Luc Danger, Tarik Graba, Yves Mathieu. Evaluation of Power-Constant Dual-Rail Logic as a Protection of Cryptographic Applications in FPGAs. Secure System Integration and Reliability Improvement, Jul 2008, Yokohama, Japan. pp.16-23, ⟨10.1109/SSIRI.2008.31⟩. ⟨hal-00259153v5⟩

Sylvain Guilley, Laurent Sauvage, Jean-Luc Danger, Philippe Hoogvorst. Area Optimization of Cryptographic Co-Processors Implemented in Dual-Rail with Precharge Positive Logic. International Conference on Field Programmable Logic and Applications, Sep 2008, Heidelberg, Germany. pp.161-166, ⟨10.1109/FPL.2008.4629925⟩. ⟨hal-00320425v2⟩

Emmanuel Boutillon, Frédéric Guillou, Jean-Luc Danger. lambda-Min Decoding Algorithm of Regular and Irregular LDPC Codes. 3nd International Symposium on Turbo Codes & Related Topics, 2003, Brest, France. ⟨hal-00068941⟩

Frédéric Guilloud, Emmanuel Boutillon, Jean-Luc Danger. Décodage des codes LDPC par l'algorithme lambda-min. GRETSI 2003, Sep 2003, Paris, France. ⟨hal-00105265⟩

Frédéric Guilloud, Emmanuel Boutillon, Jean-Luc Danger. Lambda-Min Decoding Algorithm of Regular and Irregular LDPC Codes. 3nd International Symposium on Turbo Codes and Related Topics, Sep 2003, Brest, France. pp.451-454. ⟨hal-00105245⟩

Jean-Luc Danger, Adel Ghazel, Emmanuel Boutillon, H. Laamari. Efficient FPGA Implementation of Gaussian Noise Generator for Communication Channel Emulation. 7th IEEE International Conference on Electronicsm Circuits & Systemes (ICECS'2K), Dec 2001, Kaslik, Lebanon. pp.1. ⟨hal-00347213⟩

Margaux Dugardin, Louiza Papachristodoulou, Zakaria Najm, Lejla Batina, Jean-Christophe Courrège, et al.. Power and Electromagnetic Analysis for Template Attacks. TRUDEVICE, Mar 2015, Grenoble, France. 2015. ⟨hal-01362457⟩

Benoit Badrignans, Jean-Luc Danger, Guy Gogniat, Lionel Torres, Viktor Fischer. Security Trends for FPGAS. B. Badrignans, J.L. Danger, V. Fischer, G. Gogniat, L. Torres. Springer, 282 p., 2011, 978-94-007-1337-6. ⟨lirmm-00616973⟩

Nicolas Bruneau, Jean-Luc Danger, Adrien Facon, Sylvain Guilley, Soshi Hamaguchi, et al.. Development of the Unified Security Requirements of PUFs During the Standardization Process. Innovative Security Solutions for Information Technology and Communications. 11th International Conference, SecITC 2018, Bucharest, Romania, November 8–9, 2018, Revised Selected Papers, LNCS (11359), Springer, pp.314-330, 2019, 978-3-030-12942-2. ⟨10.1007/978-3-030-12942-2_24⟩. ⟨hal-02265318⟩

Zouha Cherif, Jean-Luc Danger, Florent Lozac'H, Philippe Nguyen. Physically Unclonable Function: Principle, Design and Characterization of the Loop PUF. Trusted Computing for Embedded Systems, SPRINGER, pp.115-133, 2015, ⟨10.1007/978-3-319-09420-5_6⟩. ⟨hal-02287062⟩

Annelie Heuser, Olivier Rioul, Sylvain Guilley, Jean-Luc Danger. Information theoretic comparison of side-channel distinguishers: Inter-class distance, confusion, and success. Trusted Computing for European Embedded Systems, Springer, pp.187-225, 2014. ⟨hal-02286944⟩

Sylvain Guilley, Jean-Luc Danger. 17 : Global Fault on Cryptographic Circuits. Fault Analysis in Cryptography, Springer, pp.295-312, 2012. ⟨hal-02286401⟩

Eduardo Wanderley, Romain Vaslin, Jérémie Crenne, Pascal Cotret, Jean-Philippe Diguet, et al.. SecurityFPGA Analysis. Security Trends for FPGAS - From Secured to Secure Reconfigurable Systems, pp.7-46, 2011. ⟨lirmm-00809327⟩

Sumanta Chaudhuri, Sylvain Guilley, Philippe Hoogvorst, Jean-Luc Danger, Taha Beyrouthy, et al.. Physical Design of FPGA Interconnect to Prevent Information Leakage. Woods, R.; Compton, K.; Bourganis, C.; Diniz, P.C. Reconfigurable Computing: Architecture, Tools, and Applications, 4943, Springer, pp.87-98, 2008, Lecture Notes in Computer Science, ⟨10.1007/978-3-540-78610-8_11⟩. ⟨hal-00299487⟩

Jean-Luc Danger, Mourad Debbabi, Jean-Yves Marion, Joaquin Garcia-Alfaro, Nur Zincir Heywood. Foundations and practice of security : 6th international symposium, FPS 2013, La Rochelle, France, October 21-22, 2013, revised selected papers. 8352, Springer, pp.444, 2014, Lecture Notes in Computer Science, 978-3-319-05302-8. ⟨hal-01264784⟩

Makoto Nagata, Daisuke Fujimoto, Jean-Luc Danger, Shivam Bhasin. ON-CHIP MONITOR CIRCUIT AND SEMICONDUCTOR CHIP. Japan, Patent n° : JP20150004346 20150113. MN:OCM. 2015. ⟨hal-02412551⟩

Jean-Luc Danger, Guillaume Duc, Marc Gatti, Damien Jugié, Didier Regis, et al.. PROCEDE DE CONTROLE PREDICTIF DU FONCTIONNEMENT D'UN EQUIPEMENT ELECTRONIQUE, EQUIPEMENT ELECTRONIQUE ET DISPOSITIF DE CONTROLE. France, N° de brevet: FR20110000233 20110126. JLD:PAT-TEST-12. 2012. ⟨hal-02412521⟩

Jean-Luc Danger, Guillaume Duc, Marc Gatti, Didier Regis, Sébastien Thomas. PROCEDE DE CONTROLE DU FONCTIONNEMENT D'UN COMPOSANT ELECTRONIQUE, DISPOSITIF ELECTRONIQUE ET CALCULATEUR ELECTRONIQUE EMBARQUES CORRESPONDANTS. France, N° de brevet: FR20110001307 20110427. JLD:TEST-SCA. 2012. ⟨hal-02412522⟩

Sébastien Briais, Jean-Luc Danger, Thibault Porteboeuf, Sylvain Guilley, Philippe Nguyen. Electronic component i.e. smart card, for use in secure module, has input/output interface, and filtering and partitioning module interacting with interface to control access to one peripheral of set of peripherals. France, Patent n° : FR20110062508. JLD:firewall. 2011. ⟨hal-02412549⟩

Sylvain Guilley, Jean-Luc Danger. Method for securing result of cryptographic calculations against attack by injection of faults in chip card in electronic component, involves providing discretionary value processed by processing unit for one of output values of blocks. France, Patent n° : FR20110062509. JLD:resilience. 2011. ⟨hal-02412550⟩

Jean-Luc Danger, Sylvain Guilley, Shivam Bhasin, Maxime Nassar, Laurent Sauvage. Overview of Dual Rail with Precharge Logic Styles to Thwart Implementation-Level Attacks on Hardware Cryptoprocessors. 2009. ⟨hal-00431261⟩

Sami Mekki, Jean-Luc Danger, Benoit Miscopein, Joseph J. Boutros. EM Channel Estimation in a Low-cost UWB Receiver based on Energy Detection. 2008. ⟨hal-00296575⟩

Sami Mekki, Jean-Luc Danger, Benoit Miscopein, Joseph J. Boutros. Chi-squared Distribution Approximation for Probabilistic Energy Equalizer Implementation in Impulse-Radio UWB Receiver. 2008. ⟨hal-00299912⟩

Laurent Sauvage, Sylvain Guilley, Jean-Luc Danger, Yves Mathieu, Maxime Nassar. Successful Attack on an FPGA-based Automatically Placed and Routed WDDL+ Crypto Processor.. 2008. ⟨hal-00339858⟩

Jean-Luc Danger, Sylvain Guilley, Philippe Hoogvorst, Cédric Murdica, David Naccache. Dynamic Countermeasure Against the Zero Power Analysis. [Research Report] IACR Cryptology ePrint Archive 2013: 764 (2013), 2013. ⟨hal-00934336⟩