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136 résultats
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A Modeling Paradigm for Integrated Modular Avionics Design[Research Report] PI 1748, 2005, pp.39
Rapport
inria-00000420v1
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Affine Data-Flow Graphs for the Synthesis of Hard Real-Time ApplicationsProceedings of the 2012 12th International Conference on Application of Concurrency to System Design, Jun 2012, Hamburg, Germany. pp.183-192, ⟨10.1109/ACSD.2012.16⟩
Communication dans un congrès
hal-00763387v1
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Polychronous design of embedded real-time applicationsACM Transactions on Software Engineering and Methodology, 2007, 16 (2), ⟨10.1145/1217295.1217298⟩
Article dans une revue
inria-00522799v1
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Compositional design of isochronous systems[Research Report] RR-6227, INRIA. 2007, pp.24
Rapport
inria-00156499v5
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A boolean algebra of contracts for assume-guarantee reasoningFACS 2009 : 6th International Workshop on Formal Aspects of Component Software, Nov 2009, Eindhoven, Netherlands
Communication dans un congrès
hal-00788413v1
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Formal Verification of Synchronous Data-flow Compilers[Research Report] RR-7921, INRIA. 2012
Rapport
hal-00685633v2
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Separate compilation and execution of imperative synchronous modulesDATE 2009 : Conference & Exhibition on Design, Automation & Test in Europe, Apr 2009, Nice, France. pp.1580-1583, ⟨10.1109/DATE.2009.5090916⟩
Communication dans un congrès
hal-00788458v1
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Embedding Polychrony into SynchronyIEEE Transactions on Software Engineering, 2013
Article dans une revue
hal-00763317v1
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Representation of synchronous, asynchronous, and polychronous components by clocked guarded actionsDesign Automation for Embedded Systems, 2012, ⟨10.1007/s10617-012-9087-9⟩
Article dans une revue
hal-00763334v1
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Constructive Polychronous SystemsScience of Computer Programming, 2014, Science of Computer Programming, pp.20
Article dans une revue
hal-01095004v1
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From concurrent multi-clock programs to concurrent multi-threaded implementations[Research Report] RR-7577, INRIA. 2011, pp.22
Rapport
inria-00578585v2
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System-level Co-simulation of Integrated Avionics Using PolychronyACM Symposium On Applied Computing, Mar 2011, TaiChung, Taiwan. 6 p
Communication dans un congrès
inria-00536907v1
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ADFG: a scheduling synthesis tool for dataflow graphs in real-time systemsInternational Conference on Real-Time Networks and Systems , Oct 2017, Grenoble, France. pp.1-10, ⟨10.1145/3139258.3139267⟩
Communication dans un congrès
hal-01615142v1
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Compositional proofs in differential dynamic logic dL17th International Conference on Application of Concurrency to System Design, Jun 2017, Zaragoza, Spain
Communication dans un congrès
hal-01615140v1
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Making an eBPF Virtual Machine Faster on Microcontrollers: Verified Optimization and Proof SimplificationSETTA 2023 - 9th International Symposium Dependable Software Engineering. Theories, Tools, and Applications, Nov 2023, Nanjing (Chine), China. pp.385-401, ⟨10.1007/978-981-99-8664-4_22⟩
Communication dans un congrès
hal-04376380v1
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A Framework for Fixed Priority Periodic Scheduling Synthesis from Synchronous Data-flow GraphsSAMOS XXI 2021 - 21st International Conference on embedded computer Systems: Architectures, MOdeling and Simulation, Jul 2021, Virtual, France. pp.1-12
Communication dans un congrès
hal-03488217v1
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Translation Validation for Clock Transformations in a Synchronous CompilerFASE - ETAPS 2015, Apr 2015, London, United Kingdom
Communication dans un congrès
hal-01087795v3
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Model-Based Integration for Automotive Control SoftwareDigital Automation Conference, ACM, Jun 2015, San Francisco, United States
Communication dans un congrès
hal-01148905v1
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Programming models for multi-core embedded systemsGeorgios Kornaros. Multi-Core Embedded Systems, CRC Press, pp.269-305, 2010, 978-1439811610
Chapitre d'ouvrage
hal-00788506v1
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From AADL to timed abstract state machine: a certified model transformationJournal of Systems and Software, 2014, Journal of Systems and Software, pp.20
Article dans une revue
hal-01095002v1
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Pre-Order Semantics of UML State-Machines[Research Report] RR-3958, INRIA. 2000
Rapport
inria-00072690v1
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Clock-Driven Distributed Real-Time Implementation of Endochronous Synchronous ProgramsInternational conference on Embedded software - EMSOFT 2009, Oct 2009, Grenoble, France. ⟨10.1145/1629335.1629356⟩
Communication dans un congrès
inria-00485007v1
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Toward Polychronous Analysis and Validation for Timed Software Architectures in AADLThe Design, Automation, and Test in Europe (DATE) conference, Mar 2013, Grenoble, France. pp.6
Communication dans un congrès
hal-00763379v2
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Polychrony for system designJournal of Systems Architecture, 2002, 12, pp.261--304
Article dans une revue
hal-00730480v1
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Efficient Contention-Aware Scheduling of SDF Graphs on Shared Multi-bank MemoryICECCS 2019 - 24th International Conference on Engineering of Complex Computer Systems, Nov 2019, Hong Kong, China. pp.114-123, ⟨10.1109/ICECCS.2019.00020⟩
Communication dans un congrès
hal-02193639v2
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A Protocol for Loosely Time-Triggered ArchitecturesEmbedded Software Conference (EMSOFT '02), Oct 2002, Grenoble, France. pp.252-265, ⟨10.1007/3-540-45828-X_19⟩
Communication dans un congrès
istex
inria-00526261v1
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A Boolean algebra of contracts for logical assume-guarantee reasoning[Research Report] RR-6570, INRIA. 2008, pp.41
Rapport
inria-00292870v7
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A Simplified Account of Region Inference[Research Report] RR-4104, INRIA. 2001
Rapport
inria-00072527v1
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BDL: A Semantics Backbone for UML Dynamic Diagrams[Research Report] RR-4003, INRIA. 2000
Rapport
inria-00072641v1
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Hierarchic Normal Forms for Desynchronization[Research Report] RR-3822, INRIA. 1999
Rapport
inria-00072836v1
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