Jean-Marc Galliere
12
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Delay Testing Viability of Gate Oxide Short DefectJournal of Computer Science and Technology, 2005, 20 (2), pp.195-200. ⟨10.1007/s11390-005-0195-x⟩
Article dans une revue
lirmm-00105323v1
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Viability of a Delay Testing of Gate Oxide Short TransistorsJournal of Computer Science and Technology, 2005, 20 (2), pp.6. ⟨10.1007/s11390-005-0195-x⟩
Article dans une revue
lirmm-00370370v1
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A Compact DC Model of Gate Oxide Short DefectMicroelectronic Engineering, 2004, 72 (1-4), pp.140-148. ⟨10.1016/j.mee.2003.12.051⟩
Article dans une revue
lirmm-00108564v1
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Modeling the Random Parameter Effects in a Non-Split Model of Gate Oxide ShortJournal of Electronic Testing: : Theory and Applications, 2003, 19 (4), pp. 377-386. ⟨10.1023/A:1024683708105⟩
Article dans une revue
lirmm-00269754v1
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GOSMOS: A Gate Oxide Short Defect Embedded in a MOS Compact ModelLATW: Latin American Test Workshop, Feb 2003, Natal, Brazil
Communication dans un congrès
lirmm-00269604v1
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Delay Testing of MOS Transistor with Gate Oxide ShortATS: Asian Test Symposium, Nov 2003, Xian, China. pp.168-173
Communication dans un congrès
lirmm-00269641v1
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Modeling Gate Oxide Short Defects in CMOS Minimum TransistorsETW: European Test Workshop, 2002, Corfu, Greece. pp.15-20
Communication dans un congrès
lirmm-00268527v1
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A Non-Split Model for Realistic Gate Oxide Short in CMOS TechnologyDCIS: Design of Circuits and Integrated Systems, 2002, Santander, Spain. pp.197-204
Communication dans un congrès
lirmm-00268432v1
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Non-Linear and Non-Split Transistor MOS Model for Gate Oxyde ShortDBT: Defect Based Testing, Apr 2002, Monterey, CA, United States. pp.11-16
Communication dans un congrès
lirmm-00269333v1
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Low Voltage Testing of Gate Oxide Short in CMOS TechnologyDDECS: Design and Diagnostics of Electronic Circuits and Systems, 2002, Brno, Czech Republic. pp.168-174
Communication dans un congrès
lirmm-00268526v1
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Boolean and Current Detection of MOS Transistor with Gate Oxide ShortIEEE International Test Conference, Oct 2001, Baltimore, USA, pp.10
Communication dans un congrès
lirmm-00370400v1
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A Compact Model for Electrical Simulation of MOS Transistor with Gate Oxide Short Defect[Research Report] 04080, Lirmm, University of Montpellier. 2004
Rapport
lirmm-00109221v1
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