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Jalil Boukhobza
Professeur à l'ENSTA-Bretagne
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Documents
Affiliations actuelles
- 1067625
- 301846
Identifiants chercheurs
- jalil-boukhobza
- 0000-0002-2194-4006
- Google Scholar : http://scholar.google.com/citations?user=wV7MnBUAAAAJ&hl=fr
- IdRef : 09772582X
- ResearcherId : I-4595-2019
- ResearcherId : http://www.researcherid.com/rid/I-4595-2019
Présentation
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Feasibility interval and sustainable scheduling simulation with CRPD on uniprocessor platformJournal of Systems Architecture, 2021, 115, pp.102007. ⟨10.1016/j.sysarc.2021.102007⟩
Article dans une revue
hal-03152032v1
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Cache-aware real-time scheduling simulator: implementation and return of experienceACM SIGBED Review, 2016, Special Issue on the 5th Embedded Operating Systems Workshop (EWiLi 2015), 13 (1), pp.22-28 ⟨10.1145/2907972.2907975⟩
Article dans une revue
hal-01302239v1
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Memory hierarchy in scheduling simulation: problems, implementation & return of experienceWorkshop CAPITAL 2022: sCalable And PrecIse Timing AnaLysis for multicore platforms, Jun 2022, Grenoble, France
Communication dans un congrès
hal-03780112v1
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About Early Scheduling Verification Of Embedded Real-Time Critical Systems: An Example With AADLInvited speaker at SYRCoSE 2018 - 12th Spring/Summer Young Researchers’ Colloquium on Software Engineering, May 2018, Novgorod the Great, Russia
Communication dans un congrès
hal-01825157v1
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Patrons de conception pour l’analyse d’ordonnancement temps réel multiprocesseursTutoriel présenté à l’école d'été temps réel (ETR'2017), Aug 2017, Rennes, France
Communication dans un congrès
hal-01716933v1
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An example of early scheduling analysis with AADLPrésentation invitée à la Journée AADL du GDR SOC-SIP, Nov 2016, Paris, France
Communication dans un congrès
hal-01419160v1
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Addressing Cache Related Preemption Delay in Fixed Priority Assignment20th IEEE International Conference on Emerging Technologies and Factory Automation, Sep 2015, Luxembourg, France
Communication dans un congrès
hal-01166127v1
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Teaching Real-Time Scheduling Analysis with Cheddar9ème édition de l’Ecole d’Eté « Temps Réel », Aug 2015, Rennes, France
Communication dans un congrès
hal-01166136v1
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Integration of cache related preemption delay analysis into a priority assignment algorithmEWiLi'14, The 4th Embedded Operating Systems Workshop., Sep 2014, Lisbon, Portugal
Communication dans un congrès
hal-01166868v2
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Instruction cache in hard real-time systems: modeling and integration in scheduling analysis tools with AADLInternational Conference on Embedded and Ubiquitous Computing (EUC), Aug 2014, Milan, Italy. pp.104-111, ⟨10.1109/EUC.2014.24⟩
Communication dans un congrès
hal-01067654v1
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