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A Hybrid Fault-Tolerant Architecture for Highly Reliable Processing Cores

 Imran Wali , Arnaud Virazel , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch , et al.
Journal of Electronic Testing: : Theory and Applications, 2016, 32 (2), pp.147-161. ⟨10.1007/s10836-016-5578-0⟩
Article dans une revue lirmm-01354746v1
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Towards approximation during test of Integrated Circuits

 Imran Wali , Marcello Traiola , Arnaud Virazel , Patrick Girard , Mario Barbareschi , et al.
DDECS 2017 - 20th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Apr 2017, Dresden, Germany. pp.28-33, ⟨10.1109/DDECS.2017.7934574⟩
Communication dans un congrès lirmm-01718580v1

Protecting combinational logic in pipelined microprocessor cores against transient and permanent faults

 Imran Wali , Arnaud Virazel , Alberto Bosio , Luigi Dilillo , Patrick Girard , et al.
DDECS: Design and Diagnostics of Electronic Circuits and Systems, Apr 2014, Warsaw, Poland. pp.223-225, ⟨10.1109/DDECS.2014.6868794⟩
Communication dans un congrès lirmm-01248598v1

A Low-Cost Reliability vs. Cost Trade-Off Methodology to Selectively Harden Logic Circuits

 Imran Wali , Bastien Deveautour , Arnaud Virazel , Alberto Bosio , Patrick Girard , et al.
ETS: European Test Symposium, May 2016, Amsterdam, Netherlands. ⟨10.1109/ETS.2016.7519296⟩
Communication dans un congrès hal-01444734v1

An Efficient Framework for Design and Assessment of Arithmetic Operators with Reduced-Precision Redundancy

 Imran Wali , Emmanuel Casseau , Arnaud Tisserand
Conference on Design and Architectures for Signal and Image Processing (DASIP), Sep 2017, Dresden, Germany
Communication dans un congrès hal-01586983v1

A Case Study on the Approximate Test of Integrated Circuits

 Imran Wali , Arnaud Virazel , Patrick Girard , Mario Barbareschi , Alberto Bosio
AC: Approximate Computing, Oct 2016, Pittsburgh, PA, United States
Communication dans un congrès lirmm-01718609v1

An effective hybrid fault-tolerant architecture for pipelined cores

 Imran Wali , Arnaud Virazel , Alberto Bosio , Luigi Dilillo , Patrick Girard
ETS: European Test Symposium, May 2015, Cluj-Napoca, Romania. ⟨10.1109/ETS.2015.7138733⟩
Communication dans un congrès lirmm-01272730v1
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An Experimental Comparative Study of Fault-Tolerant Architectures

 Imran Wali , Arnaud Virazel , Alberto Bosio , Patrick Girard
VALID: Advances in System Testing and Validation Lifecycle, Nov 2015, Barcelone, Spain. pp.1-6
Communication dans un congrès lirmm-01354754v1
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Can we Approximate the Test of Integrated Circuits?

 Imran Wali , Marcello Traiola , Arnaud Virazel , Patrick Girard , Mario Barbareschi , et al.
WAPCO: Workshop On Approximate Computing, Jan 2017, Stockholm, Sweden
Communication dans un congrès lirmm-02004418v1

A Low-Cost Reliability vs. Cost Trade-Off Methodology to Selectively Harden Logic Circuits

 Arnaud Virazel , Imran Wali , Bastien Deveautour , Alberto Bosio , Patrick Girard , et al.
Journal of Electronic Testing: : Theory and Applications, 2017, 33 (1), pp.25-36. ⟨10.1007/s10836-017-5640-6⟩
Article dans une revue lirmm-01718568v1

Design space exploration and optimization of a Hybrid Fault-Tolerant Architecture

 Imran Wali , Arnaud Virazel , Alberto Bosio , Patrick Girard , Matteo Sonza Reorda
IOLTS: International On-Line Testing Symposium, Jul 2015, Halkidiki, Greece. pp.89-94, ⟨10.1109/IOLTS.2015.7229838⟩
Communication dans un congrès lirmm-01272735v1
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Circuit and system fault tolerance techniques

 Imran Wali
Electronics. Université Montpellier, 2016. English. ⟨NNT : 2016MONTT313⟩
Thèse tel-01807927v1
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