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Henri-Pierre Charles
Directeur de recherche CEA
46
Documents
Affiliations actuelles
- 1071824
Identifiants chercheurs
- henri-pierre-charles
- 0000-0002-0119-0446
- IdRef : 052298264
Site web
- https://hpcharles.wordpress.com/
Publications
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Instruction Set Design Methodology for In-Memory Computing through QEMU-based System Emulator32nd International Workshop on Rapid System Prototyping (RSP), Oct 2021, (En ligne), France
Communication dans un congrès
cea-03452244v1
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Reconfigurable tiles of computing-in-memory SRAM architecture for scalable vectorizationISLPED 2020: ACM/IEEE International Symposium on Low Power Electronics and Design, Aug 2020, Boston, MA, United States. pp.121-126, ⟨10.1145/3370748.3406550⟩
Communication dans un congrès
cea-02963719v1
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A combined fast/cycle accurate simulation tool for reconfigurable accelerator evaluation: application to distributed data management2020 IEEE International Workshop on Rapid System Prototyping (RSP), Sep 2020, Hamburg, Germany. pp.1-7, ⟨10.1109/RSP51120.2020.9244859⟩
Communication dans un congrès
cea-03000992v1
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Efficient 8-bit matrix multiplication on Computational SRAM architectureDATE 2020 ; Computing-in-Memory (CiM) Workshop, Mar 2020, Grenoble, France
Communication dans un congrès
hal-02934838v1
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Data-layout optimization based on memory-access-pattern analysis for source-code performance improvementSCOPES '20: 23rd International Workshop on Software and Compilers for Embedded Systems, May 2020, St. Goar, Germany. pp.1-6, ⟨10.1145/3378678.3391874⟩
Communication dans un congrès
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Precision variable anonymization method supporting transprecision computing22nd International Conference on Advanced Communications Technology (ICACT2020), Feb 2020, PyeongChang, South Korea. ⟨10.23919/ICACT48636.2020.9061512⟩
Communication dans un congrès
cea-02556100v1
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Unification des mémoires réparties dans un système hétérogène avec accélérateur reconfigurable : exposé de principeConférence d’informatique en Parallélisme, Architecture et Système (Compas'2019), LIUPPA - Laboratoire d'Informatique de l'Université de Pau et des Pays de l'Adour (EA 3000), Jun 2019, Anglet, France
Communication dans un congrès
cea-02279337v1
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Toward modeling cache-miss ratio for Dense-Data-Access-Based OptimizationRSP’19 - 30th International Workshop on Rapid System Prototyping, ACM; IEEE, Oct 2019, New-York, United States. ⟨10.1145/3339985.3358498⟩
Communication dans un congrès
cea-02284183v1
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"If Memory Serves" . Can we use memory for computing?COMPAS Conférence d'informatique en Parallélisme, Architecture et Système, Jun 2019, Anglet, France
Communication dans un congrès
cea-02169710v1
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Smart Instruction Codes for In-Memory Computing Architectures Compatible with Standard SRAM InterfacesDesign, Automation and Test in Europe, Mar 2018, Dresde, Germany
Communication dans un congrès
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The Multiple Ways to Automate the Application of Software Countermeasures against Physical Attacks : Pitfalls and Guidelines Cyber-Physical Security Education Workshop, Jul 2017, Paris, France
Communication dans un congrès
hal-01660155v1
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Software Platform Dedicated for In-Memory Computing Circuit EvaluationRSP'17 (Rapid System Prototyping), Oct 2017, Séoul, South Korea. ⟨10.1145/3130265.3130322⟩
Communication dans un congrès
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DRC 2 : Dynamically Reconfigurable Computing Circuit based on Memory Architecture IEEE International Conference on Rebooting Computing, Oct 2016, San Diego, France
Communication dans un congrès
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Approximate Computing with Runtime Code Generation on Resource-Constrained Embedded Devices2nd Workshop On Approximate Computing (WAPCO 2016), Jan 2016, Vienna, Austria
Communication dans un congrès
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Pushing the Limits of Online Auto-tuning: Machine Code Optimization in Short-Running KernelsProceedings of MCSOC 2016. IEEE 10th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC-16), Sep 2016, Lyon, France
Communication dans un congrès
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Self-optimisation using runtime code generation for wireless sensor networks International Conference on Distributed Computing and Networking (ICDCN 2016), Jan 2016, Singapore, Singapore. ⟨10.1145/2833312.2849557⟩
Communication dans un congrès
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Is dynamic compilation possible for embedded systems ?SCOPES ’15, June 01 - 0, Jun 2015, Sanckt Goar, Germany. ⟨10.1145/2764967.2782785⟩
Communication dans un congrès
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Self-optimisation using runtime code generation for Wireless Sensor Networks Internet-of-ThingsInternet-of-Things Symposium at ESWeek, Marilyn Wolf (Georgia Tech) Jason Xue (City University of Hong Kong), Oct 2015, Amsterdam, Netherlands
Communication dans un congrès
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Performance comparison between Java and JNI for optimal implementation of computational micro-kernelsADAPT 2015 : The 5th International Workshop on Adaptive Self-tuning Computing Systems, Jan 2015, Amsterdam, Netherlands
Communication dans un congrès
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A Compilation Flow for Parametric Dataflow: Programming Model, Scheduling, and Application to Heterogeneous MPSoCInternational Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES), Oct 2014, New Dehli, India. pp.1-10, ⟨10.1145/2656106.2656110⟩
Communication dans un congrès
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Contrôle d'application flot de données pour les systèmes sur puces : étude de cas sur la plateforme MagaliComPAS 2014 : conférence en parallélisme, architecture et systèmes, Apr 2014, Neuchâtel, Suisse. pp.1 - 12
Communication dans un congrès
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Compilation for heterogeneous SoCs : bridging the gap between software and target-specific mechanismsworkshop on High Performance Energy Efficient Embedded Systems - HIPEAC, Jan 2014, Vienne, Austria
Communication dans un congrès
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deGoal a tool to embed dynamic code generators into applications23rd International Conference on Compiler Construction (CC), Apr 2014, Grenoble, France. pp.107-112, ⟨10.1007/978-3-642-54807-9_6⟩
Communication dans un congrès
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Code Generation for an Application-Specific VLIW Processor With Clustered, Addressable Register FilesODES'13 - 10th Workshop on Optimizations for DSP and Embedded Systems, associated with CGO, Feb 2013, Shenzhen, China. pp.11-19, ⟨10.1145/2443608.2443612⟩
Communication dans un congrès
hal-00911896v1
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Software-Only Compression System for Trading-off Code Size and PerformanceSCOPES 2005 - 9th International Workshop on Software and Compilers for Embedded Systems, Sep 2005, Dallas, Texas, United States. pp.27-36, ⟨10.1145/1140389.1140393⟩
Communication dans un congrès
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An optimized and load-balanced portable parallel zbufferIST SPIE Symposium on Electronic Imaging, Feb 1995, San Jose, United States. pp.394-403
Communication dans un congrès
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Cognitive Radio Programming: Existing Solutions and Open Issues[Research Report] RR-8358, INRIA. 2013, pp.27
Rapport
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An optimized and load-balanced portable parallel zbuffer[Research Report] RR95-25, LIP ENS Lyon. 1995
Rapport
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Towards integration of a dedicated memory controller and its instruction set to improve performance of systems containing computational SRAMJournal of Low Power Electronics and Applications, 2022, 12 (1), pp.18. ⟨10.3390/jlpea12010018⟩
Article dans une revue
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Dynamic Compilation for Transprecision Applications on Heterogeneous PlatformJournal of Low Power Electronics and Applications, 2021, 11 (3), https://doi.org/10.3390/jlpea11030028. ⟨10.3390/jlpea11030028⟩
Article dans une revue
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A 35.6TOPS/W/mm$^2$ 3-Stage Pipelined Computational SRAM with Adjustable Form Factor for Highly Data-Centric ApplicationsIEEE Solid-State Circuits Letters, 2020, ⟨10.1109/LSSC.2020.3010377⟩
Article dans une revue
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Automated Software Protection for the Masses Against Side-Channel AttacksACM Transactions on Architecture and Code Optimization, 2018, 15 (4), pp.47:1--47:27. ⟨10.1145/3281662⟩
Article dans une revue
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A New Compilation Flow for Software-Defined Radio Applications on Heterogeneous MPSoCsACM Transactions on Architecture and Code Optimization, 2016, 13 (2), ⟨10.1145/2910583⟩
Article dans une revue
hal-01396143v1
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Hardware Acceleration of Red-Black Tree Management and Application to Just-In-Time CompilationJournal of Signal Processing Systems, 2014, 77, pp.95-115. ⟨10.1007/s11265-014-0902-3⟩
Article dans une revue
hal-01820218v1
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Scaling-down to Embedded Systems for Dynamic Compilation2nd International Workshop "Dynamic Compilation Everywhere", in conjunction with the 8th HiPEAC conference, Berlin, Germany, January 2013., 2013, https://sites.google.com/site/dynamiccompilationeverywhere/home/dce-2013
Article dans une revue
hal-00746825v1
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Accélération de la compilation dynamique pour les cibles embarquéesSixième colloque du GDR SOC-SIP du CNRS, 2012, pp.Session Logiciels Embarqués et Architectures Matérielles
Article dans une revue
hal-00746819v1
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A Portable Parallel Toolkit for 3D Image ProcessingEuropean Transactions on Telecommunications, 1992, 3 (6), pp.571 - 582. ⟨10.1002/ett.4460030610⟩
Article dans une revue
hal-01804076v1
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Precision variable anonymization method supporting transprecision computing2020
Autre publication scientifique
cea-02556188v1
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Smart Instruction Codes For In-Memory Computing Architectures Compatible With Standard Sram Interfaces2018
Autre publication scientifique
cea-01757665v1
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Re-Specialization of Code for ILP Support2006
Autre publication scientifique
hal-00141646v1
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Code Scheduling Support using re-Specialization2006
Autre publication scientifique
hal-00141641v1
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How to generate data dependent applications and handle platform heterogeneity ?Poster de conférence cea-04186094v1 |
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Unifying distributed memories in a heterogeneous system with reconfigurable acceleratorsConférence d’informatique en Parallélisme, Architecture et Système (Compas'2019), Jun 2019, Anglet, France
Poster de conférence
cea-02279573v1
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The INRIA ZEP project: NVRAM and Harvesting for Zero Power ComputationsNVMW 2018 - 10th Annual Non-Volatile Memories Workshop, Mar 2018, San Diego, United States. pp.1
Poster de conférence
hal-01941766v1
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Automatic Application of Software Countermeasures Against Physical AttacksÇetin Kaya Koç. Cyber-Physical Systems Security, Springer International Publishing, pp.135-155, 2018, 978-3-319-98934-1. ⟨10.1007/978-3-319-98935-8_7⟩
Chapitre d'ouvrage
hal-01951305v1
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Introduction to Dynamic Code Generation an Experiment with Matrix Multiplication for the STHORM PlatformM. Torquati, K. Bertels, S. Karlsson, and F. Pacull. Smart Multicore Embedded Systems, Springer Verlag, 2013, ⟨10.1007/978-1-4614-8800-2_6⟩
Chapitre d'ouvrage
hal-01228147v1
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