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Guy GOGNIAT
210
Documents
Présentation
Guy Gogniat is a Professor in ECE with the Université Bretagne Sud, Lorient, France, where he has been since 1998. In 2005, he spent one year as an invited Researcher with the University of Massachusetts, Amherst, USA, where he worked on embedded system security using reconfigurable technologies. His work focuses on embedded systems design methodologies and tools. He also conducts research in the domain of reconfigurable and adaptive computing and embedded system security.
Publications
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Verrouillage des lignes de cache pour la lutte contre les attaques par canaux auxiliaires exploitant les mémoires cachesCyber On Board, Mar 2024, ile des Embiez, France
Communication dans un congrès
hal-04461273v1
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On The Effect of Replacement Policies on The Security of Randomized Cache Architectures19th ACM ASIA Conference on Computer and Communications Security (ACM ASIACCS 2024), Jul 2024, Singapore, Singapore
Communication dans un congrès
hal-04427321v1
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Cache locking against cache-based side-channel attacksÉcole d'hiver Francophone sur les Technologies de Conception des Systèmes Embarqués Hétérogènes (FETCH), Université Libre de Bruxelles, Feb 2024, Maillen, Belgium
Communication dans un congrès
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Another Break in the Wall: Harnessing Fault Injection Attacks to Penetrate Software FortressesSensorsS&P: First International Workshop on Security and Privacy of Sensing Systems, Nov 2023, Istanbul Turkiye, France. pp.8-14, ⟨10.1145/3628356.3630116⟩
Communication dans un congrès
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Protecting a RISC-V embedded processor against physical and software attacksBITFLIP by DGA - European Cyber Week 2023, Nov 2023, Rennes, France
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Work in Progress: Thwarting Timing Attacks in Microcontrollers using Fine-grained Hardware Protections2023 IEEE European Symposium on Security and Privacy Workshops (EuroS&PW), Jul 2023, Delft, Netherlands. pp.1-7
Communication dans un congrès
hal-04155139v1
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When in-core DIFT faces fault injection attacksCryptArchi 2023 - 19th International Workshops on Cryptographic architectures embedded in logic devices, Jun 2023, Cantabria, Spain
Communication dans un congrès
hal-04381235v1
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Token-based Authentication and Access Delegation for HW-Accelerated telco Cloud SolutionIEEE 11th International Conference on Cloud Networking (CloudNet), Nov 2022, Paris, France
Communication dans un congrès
hal-04159586v1
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Processor Extensions for Hardware Instruction Replay against Fault Injection AttacksDDECS: 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Apr 2022, Prague, Czech Republic
Communication dans un congrès
hal-03599317v1
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Data Extraction and Deep Learning Method for Predictive Maintenance in Vessel’s Engine Room32nd European Safety and Reliability Conference (ESREL 2022)., Aug 2022, Dublin, Ireland. pp.1983-1990
Communication dans un congrès
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OAuth 2.0-based authentication solution for FPGA-enabled cloud computing14th IEEE/ACM International Conference on Utility and Cloud Computing Companion, Dec 2021, Leicester, United Kingdom. ⟨10.1145/3492323.3495635⟩
Communication dans un congrès
hal-03606350v1
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Opportunistic IP Birthmarking using Side Effects of Code Transformations on High-Level SynthesisDATE'21 Design Automation and Test in Europe, Feb 2021, Grenoble (virtuel), France
Communication dans un congrès
hal-03228922v1
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IE-Cache: Counteracting Eviction-Based Cache Side-Channel Attacks Through Indirect Eviction35th IFIP International Conference on ICT Systems Security and Privacy Protection (SEC), Sep 2020, Maribor, Slovenia. pp.32-45, ⟨10.1007/978-3-030-58201-2_3⟩
Communication dans un congrès
hal-03440838v1
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A novel Network-on-Chip security algorithm for tolerating Byzantine faults2020 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), Oct 2020, Frascati, Italy. pp.1-6, ⟨10.1109/DFT50435.2020.9250906⟩
Communication dans un congrès
hal-03606356v1
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Architectures for Security: A comparative analysis of hardware security features in Intel SGX and ARM TrustZoneC-CODE 2019 - 2nd International Conference on Communication, Computing and Digital systems, Mar 2019, Islamabad, Pakistan. pp.299-304, ⟨10.1109/C-CODE.2019.8680982⟩
Communication dans un congrès
hal-02451440v1
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Transient Key-based Obfuscation for HLS in an Untrusted Cloud Environment2019 Design, Automation & Test in Europe Conference & Exhibition, DATE 2019, Mar 2019, Florence, Italy
Communication dans un congrès
hal-02052433v1
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Sherlock Holmes of Cache Side-Channel Attacks in Intel's x86 ArchitectureIEEE-Communications and Network Security, Jun 2019, Washington DC, United States
Communication dans un congrès
hal-02151838v1
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MicroLET: A new SDNoC-based communication protocol for chipLET-based systems22nd Euromicro Conference on Digital System Design (DSD), Aug 2019, Kallithea, Greece. ⟨10.1109/DSD.2019.00019⟩
Communication dans un congrès
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A small and adaptive coprocessor for information flow tracking in ARM SoCsReConFig 2018 - International Conference on Reconfigurable Computing and FPGAs, Dec 2018, Cancun, Mexico. pp.1-17, ⟨10.1109/reconfig.2018.8641695⟩
Communication dans un congrès
hal-01911619v1
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Machine Learning For Security: The Case of Side-Channel Attack Detection at Run-timeICECS-2018, Dec 2018, Bordeaux, France
Communication dans un congrès
hal-01876792v1
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Cache-Based Side-Channel Intrusion Detection using Hardware Performance CountersCryptArchi 2018 - 16th International Workshops on Cryptographic architectures embedded in logic devices, Jun 2018, Lorient, France
Communication dans un congrès
cel-01824512v1
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A novel lightweight hardware-assisted static instrumentation approach for ARM SoC using debug componentsAsianHOST 2018 - Asian Hardware Oriented Security and Trust Symposium, Dec 2018, Hong Kong, China. pp.1-13, ⟨10.1109/asianhost.2018.8607177⟩
Communication dans un congrès
hal-01911621v1
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Run-time Detection of Prime+Probe Side-Channel Attack on AES Encryption AlgorithmGlobal Information Infrastructure and Networking Symposium (GIIS), Oct 2018, Thessaloniki, Greece
Communication dans un congrès
hal-01879950v1
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NIGHTs-WATCH: A Cache-based Side-channel Intrusion Detector Using Hardware Performance Counters7th International Workshop on Hardware and Architectural Support for Security and Privacy, Jun 2018, Los Angeles, United States. ⟨10.1145/3214292.3214293⟩
Communication dans un congrès
hal-01806729v1
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Improving Confidentiality Against Cache-based SCAsACM WomENcourage, Sep 2017, barcelona, France
Communication dans un congrès
hal-01748057v1
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ARMHEx: embedded security through hardware-enhanced information flow trackingRESSI 2017 : Rendez-vous de la Recherche et de l'Enseignement de la Sécurité des Systèmes d'Information, May 2017, Grenoble (Autrans), France
Communication dans un congrès
hal-01558155v1
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ARMHEx: A hardware extension for DIFT on ARM-based SoCs2017 27th International Conference on Field Programmable Logic and Applications (FPL), Sep 2017, Ghent, Belgium. ⟨10.23919/fpl.2017.8056767⟩
Communication dans un congrès
hal-01558473v1
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Somewhat/Fully Homomorphic Encryption: Implementation Progresses and ChallengesC2SI 2017 : 2nd International Conference on Codes, Cryptology and Information Security, Apr 2017, Rabat, Morocco. pp.68 - 82, ⟨10.1007/978-3-319-55589-8_5⟩
Communication dans un congrès
hal-01596540v1
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MPSoCSim extension: An OVP Simulator for the Evaluation of Cluster-based Multicore and Many-core architectures4rd Workshop on Virtual Prototyping of Parallel and Embedded Systems (ViPES) as part of the International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), Jul 2016, Samos, Greece
Communication dans un congrès
hal-01347188v1
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Towards a hardware-assisted information flow tracking ecosystem for ARM processors26th International Conference on Field-Programmable Logic and Applications (FPL 2016), Aug 2016, Lausanne, Switzerland. ⟨10.1109/fpl.2016.7577396⟩
Communication dans un congrès
hal-01337579v1
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Dynamic Spatially Isolated Secure Zones for NoC-based Many-core Accelerators8th IEEE International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip, Jun 2016, Tallinn, Estonia. ⟨10.1109/ReCoSoC.2016.7533900⟩
Communication dans un congrès
hal-01347175v1
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Side Channel Attacks on networks on ChipInternational CryptArchi Workshop , Jun 2016, La Grande-Motte, France
Communication dans un congrès
hal-01382984v1
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Dynamic NoC buffer allocation for MPSoC timing side channel attack protectionIEEE 7th Latin American Symposium on Circuits & Systems, LASCAS 2016, Jan 2016, Florianopolis, Brazil
Communication dans un congrès
hal-01427624v1
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Network Contention-Aware Method to Evaluate Data Coherency Protocols within a Compilation Toolchain 10th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, MCSOC 2016, Sep 2016, Lyon, France. pp.249-256, ⟨10.1109/MCSoC.2016.54⟩
Communication dans un congrès
hal-01427629v1
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ALMOS many-core operating system extension with new secure-enable mechanisms for dynamic creation of secure zones24th Euromicro International Conference on Parallel, Distributed and Netwprk-Based Processing (PDP 2016), Feb 2016, Heraklion - Crete, Greece
Communication dans un congrès
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A portable approach for SoC-based Dynamic Information Flow Tracking implementations11ème Colloque du GDR SoC/SiP, Jun 2016, Nantes, France
Communication dans un congrès
hal-01311045v1
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Fast polynomial arithmetic for Somewhat Homomorphic Encryption operations in hardware with Karatsuba algorithmInternational Conference on Field-Programmable Technology (FPT), Dec 2016, Xi’an, China. ⟨10.1109/FPT.2016.7929535⟩
Communication dans un congrès
hal-01427642v1
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Towards risk aware NoCs for data protection in MPSoCs11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, ReCoSoC 2016, Jun 2016, Tallinn, Estonia
Communication dans un congrès
hal-01427635v1
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Modèles temporels d'évaluation des protocoles de gestion des donnéesConférence d’informatique en Parallélisme, Architecture et Système (Compas'2016), Jul 2016, Lorient, France
Communication dans un congrès
cea-02129247v1
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Cycle-based model to evaluate consistency protocols within a multi-protocol compilation tool-chainCOSMIC '15 Proceedings of the 2015 International Workshop on Code Optimisation for Multi and Many Cores, Feb 2015, San Francisco Bay Area, United States. ⟨10.1145/2723772.2723779⟩
Communication dans un congrès
cea-01818885v1
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Reconfigurable Security Architecture for disrupted protection zones in NoC−Based MPSoCs10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC 2015), Jun 2015, Bremen, Germany
Communication dans un congrès
hal-01185643v1
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Exploration of Polynomial Multiplication Algorithms for Homomorphic Encryption SchemesInternational Conference on Reconfigurable Computing and FPGAs (ReConFig), Dec 2015, Cancun, Mexico. ⟨10.1109/ReConFig.2015.7393307⟩
Communication dans un congrès
hal-01273192v1
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Aide à la décision pour le choix et le paramétrage de protocoles de cohérence des donnéesRoadef, Feb 2015, Marseille, France
Communication dans un congrès
hal-01273631v1
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3D-LeukoNoC: A Dynamic TSV-Based 3D-MPSoC ProtectionInternational Conference on Reconfigurable Computing and FPGAs (Reconfig), Dec 2014, Cancun, Mexico
Communication dans un congrès
hal-01083262v1
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Elastic Security Zones for NoC-Based 3D-MPSoCs21st IEEE International Conference on Electronics Circuits and Systems, Nov 2014, Marseille, France
Communication dans un congrès
hal-01083263v1
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Extending Multicore Architectures with Cryptoptocessors and Parallel CryptographyColloque national du GDR SOC-SIP, Jun 2014, Paris, France
Communication dans un congrès
ujm-01015264v1
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Trusted Computing using Enhanced Manycore Architectures with Cryptoprocessors22nd IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2014, Oct 2014, http://www.vlsi-soc.com/, France
Communication dans un congrès
hal-01075919v1
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Using the Spring Physical Model to Extend a Cooperative Caching Protocol for Many-Core ProcessorsIEEE 8th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC-14), Sep 2014, Aizu-Wakamatsu, Japan
Communication dans un congrès
hal-01071470v1
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Plateforme multi-ASIP reconfigurable dynamiquement pour le turbo décodage dans un contexte multi-standardGRETSI 2013 : 24ème colloque du Groupement de Recherche en Traitement du Signal et des Images, Sep 2013, Brest, France
Communication dans un congrès
hal-00876009v1
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An efficient on-chip configuration infrastructure for a flexible multi-ASIP turbo decoder architectureReCoSoC 2013 : 8th IEEE International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip, Jul 2013, Darmstadt, Germany. ⟨10.1109/ReCoSoC.2013.6581518⟩
Communication dans un congrès
hal-00873978v1
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Towards practical program execution over fully homomorphic encryption schemes2013 Eighth International Conference on P2P, Parallel, Grid, Cloud and Internet Computing (3PGCIC-2013), Oct 2013, Compiègne, France
Communication dans un congrès
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Optimizations for an efficient reconfiguration of an ASIP-based turbo decoderISCAS 2013 : IEEE International Symposium on Circuits and Systems, May 2013, Beijing, Chine. pp.493 - 496, ⟨10.1109/ISCAS.2013.6571888⟩
Communication dans un congrès
hal-00873979v1
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Stopping-free dynamic configuration of a multi-ASIP turbo decoderDSD 2013 : 16th Euromicro Conference on Digital System Design, Sep 2013, Santander, Spain. pp.155 - 162
Communication dans un congrès
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Introducing a Data Sliding Mechanism for Cooperative Caching in Manycore ArchitecturesThe 27th IEEE International Parallel & Distributed Processing Symposium, May 2013, Boston, Massachusetts, United States. pp.335-344
Communication dans un congrès
hal-00833565v1
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A reconfigurable multi-standard ASIP-based turbo decoder for an efficient dynamic reconfiguration in a multi-ASIPISVLSI 2013 : IEEE Computer Society Annual Symposium on VLSI, Aug 2013, Natal, Brazil. ⟨10.1109/ISVLSI.2013.6654620⟩
Communication dans un congrès
hal-01002828v1
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Bus-based MPSoC security through communication protection: A latency-efficient alternativeFCCM 2012 (20th Annual IEEE International Symposium on Field-Programmable Custom Computing Machines), Apr 2012, Toronto, Canada. pp.200-207
Communication dans un congrès
hal-00750343v1
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An analytical approach for sizing of heterogeneous multiprocessor flexible platform for iterative demapping and channel decodingInternational Conference on ReConFigurable Computing and FPGAs (Reconfig), Dec 2012, Cancun, Mexico. ⟨10.1109/ReConFig.2012.6416728⟩
Communication dans un congrès
hal-00747714v1
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Multi-objective Artificial Immune Algorithm for Security-constrained Multi-application NoC mappingGenetic and evolutionary computation conference GECCO 2012, 2012, United States
Communication dans un congrès
hal-00765643v1
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Hierarchical NoC-based security for MP-SoC dynamic protectionIEEE Latin American Symposium on Circuits and Systems, 2012, Mexico
Communication dans un congrès
hal-00765642v1
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Lightweight reconfiguration security services for AXI-based MPSoCsFPL 2012 (22nd International Conference on Field Programmable Logic and Applications), Aug 2012, Oslo, Norway. pp.655-658, ⟨10.1109/FPL.2012.6339233⟩
Communication dans un congrès
hal-00750332v1
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Hybrid-on-Chip communication architecture for dynamic MP-SoC protectionSymposium on Integrated Circuits and Systems Design, 2012, Brazil
Communication dans un congrès
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Designing formal reconfiguration control using UML/MARTE2012 7th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), Jul 2012, York, United Kingdom
Communication dans un congrès
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Modeling and Synthesis of a Dynamic and Partial Reconfiguration ControllerInternational Conference on Field Programmable Logic and Applications (FPL), Aug 2012, Oslo, Norway
Communication dans un congrès
hal-00747718v1
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Protecting embedded systems through system level security mechanisms: from boot-up to steady state executionConference on Design of Circuits and Integrated Systems (DCIS), 2012, France
Communication dans un congrès
hal-00765645v1
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Security enhancements for FPGA-based MPSoCs: a boot-to-runtime protection flow for an embedded Linux-based systemReCoSoC: Reconfigurable Communication-centric Systems-on-Chip, Jul 2012, York, United Kingdom. pp.1-8
Communication dans un congrès
hal-00750339v1
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Asymmetric Cache Coherency: Improving Multicore Performance for Non-uniform Workloads6th Int. Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC'11), Jun 2011, France
Communication dans un congrès
hal-00671062v1
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Dynamic applications on reconfigurable systems: From UML model design to FPGAs implementationDesign, Automation & Test in Europe Conference & Exhibition (DATE), Mar 2011, Grenoble, France. ⟨10.1109/DATE.2011.5763315⟩
Communication dans un congrès
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Management of reconfigurable multi-standards ASIP-based receiverSOC-SIP : colloque national du groupe de recherches System On Chip - System In Package, Jun 2011, Lyon, France
Communication dans un congrès
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Modélisation et contrôle de la reconfiguration dynamique et partielleSympA 2011, May 2011, France
Communication dans un congrès
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A Reconfigurable Multi-core cryptoprocessor for Multi-channel Communication SystemsIPDPS - 25th IEEE International Parallel & Distributed Processing Symposium, May 2011, Anchorage, United States. pp.199-206
Communication dans un congrès
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Distributed security for communications and memories in a multiprocessor architectureRAW 2011 (18th Reconfigurable Architectures Workshop), May 2011, Anchorage, Alaska, United States. pp.326-329, ⟨10.1109/IPDPS.2011.158⟩
Communication dans un congrès
ujm-00664284v1
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Efficient Key-Dependent Message Authentication in Reconfigurable HardwareInternational Conference on Field-Programmable Technology (FPT'11), Dec 2011, India
Communication dans un congrès
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Design and implementation of a multi-core crypto-processor for software defined radiosSymposium on Applied Reconfigurable Computing, Mar 2011, Belfast, United Kingdom. pp.29-40, ⟨10.1007/978-3-642-19475-7_5⟩
Communication dans un congrès
hal-00668594v1
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UML design for dynamically reconfigurable embedded systemsDesign Automation and Test in Europe, 2010, Dresden, Germany. pp.1195
Communication dans un congrès
hal-00486748v1
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A Multi-Core AES Cryptoprocessor for Multi-Channel SDRMilitary Communication and Information Systems Conference, MCC 2010, Sep 2010, Wroclaw, Poland. pp.1-7
Communication dans un congrès
ujm-00552208v1
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Self-reconfigurable embedded systems: from modeling to implementationEngineering of Reconfigurable Systems and Algorithms, Jul 2010, Las Vegas, Nevada, United States
Communication dans un congrès
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UML design for dynamically reconfigurable multiprocessor embedded systems,Design, Automation & Test in Europe Conference & Exhibition, 2010, Germany. pp.1195 - 1200
Communication dans un congrès
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Predictibility of inter-components latency in a Software Communications Architecture Open Environment24th IEEE International Parallel and Distributed Processing Symposium, Apr 2010, Atlanta, United States
Communication dans un congrès
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Latency estimation due to middleware used in Software Defined Radio Platform6th Workshop on Software Radio, Mar 2010, Karlsruhe, Germany
Communication dans un congrès
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Modeling and formal control of partial dynamic reconfigurationReconfig, 2010, Cancun, Mexico
Communication dans un congrès
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Rapid application development on multi-processor reconfigurable systemsThe International Conference on Field Programmable Logic and Applications (FPL), Aug 2010, Milan, Italy. ⟨10.1109/FPL.2010.65⟩
Communication dans un congrès
hal-00488527v1
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IP reuse in an MDA MPSoPC co-design approachInternational Conference on Microelectronics (ICM'09), Dec 2009, Morocco. pp.0
Communication dans un congrès
hal-00454761v1
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A co-design approach for embedded system modeling and code generation with UML and MARTE,Design, Automation & Test in Europe, 2009, France
Communication dans un congrès
hal-00369036v1
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A Reconfigurable Crypto Sub System for the Sotware Communication ArchitectureIEEE Military Communications Conference, MILCOM 2009, Oct 2009, Boston, United States. pp.1-7
Communication dans un congrès
hal-00479692v1
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Reconfigurable MPSoCs for On-Demand ComputingGRETSI 2009, Sep 2009, Dijon, France. pp.1
Communication dans un congrès
hal-00422152v1
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Configuration server for self-adaptive architecturesDASIP, Sep 2009, Sophia Antipolis, France. Paper ID: 47
Communication dans un congrès
hal-00422161v1
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Networked Self-Adaptive Systems: An Opportunity for Configuring in the LargeInt. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), Jul 2009, Las Vegas, USA, France
Communication dans un congrès
hal-00422136v1
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Memory Security Management for Reconfigurable embedded SystemsInternational Conference on Field-Programmable Technology 2008, 2008, Taiwan
Communication dans un congrès
hal-00369049v1
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System level design space exploration for multiprocessor system on chipIEEE Computer Society Annual Symposium on VLSI, 2008, France
Communication dans un congrès
hal-00369061v1
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A Comparative Study of Two Software Defined Radio EnvironmentsSDR Forum Technical Conference, Oct 2008, Washington, United States
Communication dans un congrès
hal-00486625v1
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A Method for A Priori Implementation Effort Estimation for Hardware DesignIntl. Consortium for Educational Development, 2008, Malaysia
Communication dans un congrès
hal-00369055v1
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A Code Compression Method to Cope with Security Hardware Overheads19th International Symposium on Computer Architecture and High Performance Computing, 2007, Gramado, RS, Brazil. pp.XX
Communication dans un congrès
hal-00174326v1
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Bus Decryption Overhead Minimization with Code CompressionThe 3rd III IEEE Southern Conference on Programmable Logic, Feb 2007, Mar del Plata, Argentina. pp.XX
Communication dans un congrès
hal-00174323v1
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A Code Compression Method With Confidentiality and Integrity CheckingThe 2007 International Conference on Embedded Systems and Applications,, Jun 2007, Las Vegas, Nevada, United States. pp.XX
Communication dans un congrès
hal-00174321v1
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The Allele Search Lab to Improve Heterogeneous Reconfigurable Platform Design SkillsThe 2nd International Workshop on Reconfigurable Computing Education, May 2007, Porto Allegre, Brazil. pp.XX
Communication dans un congrès
hal-00174324v1
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Low latency solution for confidentiality and integrity checking in embedded systems with off-chip memoryReconfigurable communication-centric Socs 2007, Jun 2007, Montpellier, France
Communication dans un congrès
hal-00165288v1
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How to Teach Hardware Security - A SurveyInternational CryptArchi Workshop, Sep 2007, Montpellier, France
Communication dans un congrès
hal-00400017v1
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NOC-centric Security of Reconfigurable SoCFirst International Symposium on Networks-on-Chip (NOCS'07), May 2007, France. pp.223-232, ⟨10.1109/NOCS.2007.32⟩
Communication dans un congrès
hal-00165452v1
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IBC-EI: An Instruction Based Compression Method with Encryption and Integrity CheckingReCoSoC'07: International Workshop on Reconfigurable Communication Centric System-On-Chips, Jun 2007, Montpellier, France. pp.138-145
Communication dans un congrès
lirmm-00179500v1
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Hardware implementation of a multi-mode hash architecture for MD5, SHA-1 and SHA-2Workshop on Design and Architectures for Signal and Image Processing, 2007, France. pp.XX
Communication dans un congrès
hal-00488632v1
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How to Teach Hardware Security?International CryptArchi Workshop, Sep 2007, Montpellier, France
Communication dans un congrès
hal-00400015v1
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A Code Compression Method with Encryption and Integrity CheckingCryptArchi: Cryptographic Architectures, Jun 2007, Montpellier, France
Communication dans un congrès
lirmm-00179964v1
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High Efficiency Protection Solution for Off-Chip Memory in Embedded Systemsinternational conference on engineering of reconfigurable systems & algorithms, Jun 2007, Las Vegas, United States. pp.117
Communication dans un congrès
hal-00153120v1
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Reconfigurable Security Support for Embedded Systems2006, 8 p
Communication dans un congrès
hal-00089406v1
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Trusted computing - A new challenge for embedded systemsInternational Conference on Electronics, Circuits and Systems 2006, Dec 2006, Nice, France
Communication dans un congrès
hal-00124415v1
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Method for Embedded Application Prototyping based on SoC Platform and Architecture Model2006, 6 p
Communication dans un congrès
hal-00089403v1
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Custom Instruction Integration Method within Reconfigurable SoC and FPGA DevicesThe International Conference on Microelectronics (ICM 2006), Dec 2006, Saudi Arabia. pp.XX
Communication dans un congrès
hal-00488567v1
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A3S Method and Tools for Analysis of Real-Time Embedded SystemsInternational Workshop on Modeling and Analysis of Real-Time and Embedded Systems, Oct 2006, Genova, Italy
Communication dans un congrès
hal-00105595v1
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Secure architecture in embedded systems: an overviewReconfigurable communication-centric Socs 2006, Jun 2006, Montpellier, France
Communication dans un congrès
hal-00124412v1
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Genetic algorithm for high level analysis and architecture explorationIP Based Design 2006 Workshop, Dec 2006, Grenoble, France. pp.XX
Communication dans un congrès
hal-00174325v1
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IPSec Implementation Project using FPGA and Microcontroller2006, 5 p
Communication dans un congrès
hal-00089407v1
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Secure architecture in embedded systems: an overview2006, 9 p
Communication dans un congrès
hal-00089408v1
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Collaborative Monitors for Embedded System Security2006, pp.XX
Communication dans un congrès
hal-00089605v1
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System Level Design with UML: a unified approachIEEE Symposium on Industrial Embedded System, Oct 2006, Antibes, France
Communication dans un congrès
hal-00105589v1
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Mapping SoC architecture Solutions for an Application based on PACM Model2006, 6 p
Communication dans un congrès
hal-00089400v1
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Configurable computing for high-security/high-performance ambient systems2005, 10 p
Communication dans un congrès
hal-00089410v1
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Méthode d'exploration de l'espace de conception ciblant des architectures reconfigurablesJournées IEEE francophones sur l'Adéquation Algorithme Architecture (JFAAA 2005), Jan 2005, Dijon, France
Communication dans un congrès
hal-00400039v1
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UML Framework for PIM and PSM Verification of SDR SystemsSDR Forum Technical Conference'05, 2005, Anaheim, CA, United States
Communication dans un congrès
hal-00084148v1
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Generic Design Space Exploration for Reconfigurable Architectures2005, 4 p
Communication dans un congrès
hal-00089409v1
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Reconfigurable Security Primitive for Embedded Systems2005, 8 p
Communication dans un congrès
hal-00089411v1
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Software radio and dynamic reconfiguration on a DSP/FPGA platform3rd Karlsruhe Workshop on Software Radios, 2004, France. pp.XX
Communication dans un congrès
hal-00089420v1
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Platform Selection According to SoC Architecture: a case study2004, 6 p
Communication dans un congrès
hal-00089412v1
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High level analysis of multiprocessor system on chip2004, pp.8
Communication dans un congrès
hal-00089415v1
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Verification of system coherency at early architecture design stageSDR Forum General Meeting, 2004, Germany
Communication dans un congrès
hal-00089749v1
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UML Profile for SDR Hardware/Software Adequacy VerificationOMG's First Annual Software-Based Communications (SBC) Workshop: From Mobile to Agile Communications, 2004, United States. pp.XX
Communication dans un congrès
hal-00089751v1
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UML profiles towards waveform performances verificationWWRF11 Meeting Services and Applications Roadmaps, 2004, Norway. pp.XX
Communication dans un congrès
hal-00089750v1
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Metrics for high level analysis of multiprocessor system on chip2004, pp.XX
Communication dans un congrès
hal-00089416v1
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IP Processor Core Platform Selection According to SoC Architecture: a case study2004, pp.5
Communication dans un congrès
hal-00089414v1
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UML Profile for waveform SPS abstractionSDR forum Technical Conference, Nov 2004, Phoenix, United States
Communication dans un congrès
hal-00105601v1
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Dynamically Configurable Security for SRAM FPGA Bitstreams2004, pp.XX
Communication dans un congrès
hal-00089442v1
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Interface design approach for system on chip based on configuration2003, pp.XX
Communication dans un congrès
hal-00089430v1
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Fast Prototyping of Reconfigurable Architectures: An Estimation And Exploration Methodology from System-Level Specifications2003, pp.XX
Communication dans un congrès
hal-00089446v1
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Fast Prototyping of Reconfigurable Architectures From a C Program2003, pp.XX
Communication dans un congrès
hal-00089429v1
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Communication costs driven design space exploration for reconfigurable architectures2003, pp.XX
Communication dans un congrès
hal-00089443v1
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Fast Design Space Exploration Method for Reconfigurable Architectures2003, pp.XX
Communication dans un congrès
hal-00089445v1
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Targeting Tiled Architectures in Design Exploration2003, pp.XX
Communication dans un congrès
hal-00089448v1
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Partitioning and CoDesign tools & methodology for Reconfigurable Computing: The EPICURE philosophyJul 2003, pp.XX
Communication dans un congrès
hal-00106323v1
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Flot d'exploration des architectures reconfigurablesJournées IEEE francophones sur l'Adéquation Algorithme Architecture (JFAAA 2005), Dec 2002, Monastir, Tunisie
Communication dans un congrès
hal-00400043v1
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Vers une approche unifiée pour la conception globale de télécommunicationsJournées IEEE francophones sur l'Adéquation Algorithme Architecture (JFAAA 2005), Dec 2002, Monastir, Tunisie
Communication dans un congrès
hal-00400050v1
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Estimation de performances à un niveau comportemental pour l'implantation sur composants FPGAs7ème Symposium en Architectures Nouvelles de Machines, 2001, Paris, France
Communication dans un congrès
hal-01017499v1
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FPGA area time power estimation for DSP applicationsInternational Conference on Signal Processing Applications and Technologies, 2000, Dallas, United States
Communication dans un congrès
hal-01017479v1
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Méthode de conception d'architectures hétérogènes pour les applications de traitement numérique du signal3ème Journées Nationales du Réseau Doctoral de Microélectronique, 2000, Montpellier, France
Communication dans un congrès
hal-01017483v1
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Area time power estimation for FPGA based designs at a behavioral levelIEEE International Conference on Electronics, Circuits and Systems, 2000, Beirut, Lebanon. ⟨10.1109/ICECS.2000.911593⟩
Communication dans un congrès
hal-01017471v1
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A hardware software co design methodology for heterogeneous architecture estimationInternational Conference on Signal Processing Applications and Technologies, 1999, Orlando, United States
Communication dans un congrès
hal-01017450v1
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Estimation d'architectures hétérogènes pour les applications de traitement numérique du signal2ème Colloque du GDR CAO de Circuits Int égrés et Syst èmes, 1999, Aix-en-Provence, France
Communication dans un congrès
hal-01017443v1
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A path analysis based partitioning for time constrained embedded systemsInt. Conference on Signal Processing Applications and Technology (ICSPAT, Mar 1998, Seattle, United States. pp.85-89
Communication dans un congrès
hal-01943417v1
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A guide to take decisions earlier in the design flowICSPAT, Sep 1998, Toronto, Canada. pp.805-808
Communication dans un congrès
hal-02006659v1
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Communication synthesis and HW/SW integration for embedded system designSixth International Workshop on Hardware/Software Codesign. (CODES/CASHE'98), Mar 1998, Seattle, United States. ⟨10.1109/HSC.1998.666237⟩
Communication dans un congrès
hal-01930644v1
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Etude de la conception logiciel/matériel d’une application d’annulation d’écho acoustiquColloques CAO de circuits intégrés et systèmes, Jan 1997, Grenoble, France
Communication dans un congrès
hal-01410257v1
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When in-core DIFT faces fault injection attacksRISC-V Summit Europe 2023,, Jun 2023, Barcelone, Spain. 2023
Poster de conférence
hal-04132319v1
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ARMHEx: a framework for efficient DIFT in real-world SoCsPoster de conférence hal-01558475v1 |
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HardBlare: a Hardware-Assisted Approach for Dynamic Information Flow TrackingSéminaire des doctorantes et doctorants en informatique de la Société Informatique de France, Apr 2016, Paris, France. 2016
Poster de conférence
hal-01311032v1
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HardBlare: an efficient hardware-assisted DIFC for non-modified embedded processorsHiPEAC, Jan 2016, Prague, Czech Republic. 2016
Poster de conférence
hal-01450844v1
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HardBlare: an efficient hardware-assisted DIFC for non-modified embedded processorsCHES 2015 - Workshop on Cryptographic Hardware and Embedded Systems, Sep 2015, Saint-Malo, France. 2015
Poster de conférence
hal-01252597v1
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Efficient dynamic configuration of a multi-ASIP turbo decoderGDR SoC-SiP 2013 : Colloque National du Groupe de Recherche System on Chip -System in Package, Jun 2013, Lyon, France
Poster de conférence
hal-00876017v1
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Security Trends for FPGASB. Badrignans, J.L. Danger, V. Fischer, G. Gogniat, L. Torres. Springer, 282 p., 2011, 978-94-007-1337-6
Ouvrages
lirmm-00616973v1
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Protecting Behavioral IPs During Design Time: Key-Based Obfuscation Techniques for HLS in the CloudBehavioral Synthesis for Hardware Security, Springer International Publishing; Springer International Publishing, pp.71-93, 2022, ⟨10.1007/978-3-030-78841-4_5⟩
Chapitre d'ouvrage
hal-04115023v1
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Towards NoC Protection of HT-Greyhole AttackAlgorithms and Architectures for Parallel Processing, 12454, Springer International Publishing, pp.309-323, 2020, Lecture Notes in Computer Science, ⟨10.1007/978-3-030-60248-2_21⟩
Chapitre d'ouvrage
hal-03606358v1
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End-to-End Bitstreams Repository Hierarchy for FPGA Partially Reconfigurable SystemsGuy Gogniat, Dragomir Milojevic, Adam Morawiec, Ahmet Erdogan. Algorithm-Architecture Matching for Signal and Image Processing, Springer, pp.171-194, 2011, Lecture Notes in Electrical Engineering
Chapitre d'ouvrage
hal-00670954v1
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Chapter 5: Hardware Security in Embedded SystemsEditied by F. Krief. Communicating Embedded Systems, Network Applications, ISTE Ltd and John Wiley & Sons, Inc,, pp.139 - 174, 2010
Chapitre d'ouvrage
hal-00488578v1
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Chapitre 5 : La sécurité matérielle des systèmes embarqués,Les systèmes embarqués communicants : mobilité, sécurité, autonomie (Traité IC2, série réseaux et télécoms), sous la direction de F. Krief, Hermes - Lavoisier, p. 143-173, 2008
Chapitre d'ouvrage
hal-00369028v1
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From MDD concepts to experiments and illustrationsSchedulability Analysis and MDD, International Scientific and Technical Encyclopedia, 111-130 - Chapter 7, 2006
Chapitre d'ouvrage
hal-00270008v1
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Model driven Engineering for distributed Real-Time Embedded Systems: From MDD concepts to Experiments and IllustrationsFrom MDD concepts to Experiments and Illustrations, x, Chapt 7, 110-130, 2006
Chapitre d'ouvrage
hal-00105614v1
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A Modeling Method for Reconfigurable ArchitecturesThe Kluwer International Series in Engineering and Computer Science. System-on Chip for Real Time Applications, Springer, pp.170-180, 2003
Chapitre d'ouvrage
hal-00106213v1
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Procédé de reconfiguration d'un ensemble de composants d'un circuit électronique, système de reconfiguration et procédé de transmission de données correspondantsFrance, N° de brevet: FR 0850641. 2008
Brevet
hal-00447022v1
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Adaptive Cooperative Caching for Many-cores systems2013, pp.89-92
Autre publication scientifique
hal-00847002v1
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Une Plate-Forme Légère Reconfigurable Partiellement à Distance2008
Pré-publication, Document de travail
hal-00202146v1
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Bitstreams Repository Hierarchy for FPGA Partially Reconfigurable Systems2008
Pré-publication, Document de travail
hal-00369078v1
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